1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup RTEMSBSPsPowerPCMPC55XX |
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5 | * |
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6 | * @brief SIU PCR configuration. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Obere Lagerstr. 30 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.org/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <bsp/mpc55xx-config.h> |
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24 | |
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25 | const mpc55xx_siu_pcr_config mpc55xx_start_config_siu_pcr [] = { |
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26 | #if defined(MPC55XX_BOARD_GWLCFM) |
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27 | { 0,16, 0, {.B.PA = 1, .B.WPE = 0}}, /* PA[ 0..15] analog input */ |
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28 | { 16, 4, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PB[ 0.. 4] LED/CAN_STBN out */ |
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29 | { 20, 2, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PB[ 5.. 6] CAN_ERR/USBFLGC in*/ |
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30 | { 22, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PB[ 7 ] FR_A_EN out */ |
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31 | { 23, 4, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PB[ 8..10] IRQ/FR_A_ERR/USB_RDYin */ |
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32 | { 27, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PB[11..11] FR_STBN out */ |
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33 | |
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34 | { 32, 2, 0, {.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PC[ 0.. 1] FR_A_TX/TXEN out */ |
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35 | { 34, 1, 0, {.B.PA = 2,.B.IBE = 1,.B.WPE = 0}}, /* PC[ 2.. 2] FR_A_RX in */ |
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36 | { 35, 2, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[ 3.. 4] INIT_ERR/ISB_IRQ in */ |
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37 | { 37, 2, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[ 5.. 6] PWRO1/2_ON out */ |
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38 | { 39, 1, 0, {.B.PA = 2,.B.IBE = 1,.B.WPE = 0}}, /* PC[ 7.. 7] FR_B_RX in */ |
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39 | { 40, 2, 0, {.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PC[ 8.. 9] FR_B_TX/TXEN out */ |
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40 | { 42, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[10 ] FR_B_EN out */ |
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41 | { 43, 1, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[11 ] FOR_STATUS in */ |
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42 | { 44, 1, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[12 ] FR_B_ERRN in */ |
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43 | { 45, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[13 ] HS_CAN_STBN out */ |
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44 | { 46, 1, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PC[14 ] HS_CAN_ERR in */ |
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45 | { 47, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PC[15 ] HS_CAN_EN out */ |
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46 | |
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47 | { 48, 1, 0, {.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PD[ 0 ] HS_CAN_TX out */ |
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48 | { 49, 1, 0, {.B.PA = 1,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 1 ] HS_CAN_RX in */ |
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49 | { 50, 2, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 2.. 3] PWRO1/2_OC in */ |
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50 | { 52, 1, 0, {.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PD[ 4 ] LS_CAN_TX out */ |
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51 | { 53, 1, 0, {.B.PA = 1,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 5 ] LS_CAN_RX in */ |
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52 | { 54, 1, 0, {.B.PA = 1,.B.OBE = 1,.B.WPE = 0}}, /* PD[ 6 ] HS_CAN_TX out */ |
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53 | { 55, 1, 0, {.B.PA = 1,.B.IBE = 1,.B.WPE = 0}}, /* PD[ 7 ] HS_CAN_RX in */ |
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54 | { 56, 1, 0, {.B.PA = 2,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}}, |
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55 | /* PD[ 8 ] I2C_SCL in/out */ |
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56 | { 57, 1, 0, {.B.PA = 2,.B.IBE = 1,.B.OBE = 1,.B.WPE = 0}}, |
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57 | /* PD[ 9 ] I2C_SDA in/out */ |
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58 | |
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59 | { 58, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PD[10] LS_CAN_EN out*/ |
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60 | { 59, 3, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, |
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61 | /* PD[11..13] PWO1_OC, MOCO_INT in */ |
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62 | |
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63 | { 62, 4, 0, {.B.PA = 0,.B.IBE = 1,.B.WPE = 0}}, /* PD[14..15] USB_FLGA/B in */ |
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64 | |
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65 | { 64, 5, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PE[ 0.. 4] LED_EXT1-5. out*/ |
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66 | { 70, 1, 0, {.B.PA = 1,.B.SRC = 3,.B.WPE = 0}}, /* PE[ 6.. 6] CLKOUT out*/ |
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67 | |
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68 | { 80, 1, 0, {.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 0.. 0] RD_WR out*/ |
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69 | { 81, 1, 0, {.B.PA = 0,.B.SRC = 0,.B.WPE = 0}}, /* PF[ 1.. 1] (nc) in */ |
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70 | { 82, 8, 0, {.B.PA = 2,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 2..11] ADDR[8..15] out*/ |
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71 | { 90, 2, 0, {.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[ 2..11] CS[0..1] out*/ |
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72 | { 92, 1, 0, {.B.PA = 3,.B.SRC = 3,.B.WPE = 0}}, /* PF[ 12] ALE out*/ |
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73 | { 93, 3, 0, {.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PF[13..15] OE/WE out*/ |
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74 | |
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75 | { 96,16, 0, {.B.PA = 1,.B.SRC = 1,.B.WPE = 0}}, /* PG[ 0..15] AD16..31 in/out*/ |
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76 | |
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77 | {113, 1, 1, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 1.. 1] RES_MOSTComp out*/ |
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78 | {114, 1, 0, {.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 2.. 2] CS3_MOSTComp out*/ |
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79 | {115, 1, 0, {.B.PA = 3,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 3.. 3] CS2_ETH out*/ |
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80 | {116, 2, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 4.. 5] FR/HC_TERM out*/ |
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81 | {118, 1, 0, {.B.PA = 2,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 6.. 6] LIN_Tx out*/ |
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82 | {119, 1, 0, {.B.PA = 2,.B.IBE = 1,.B.WPE = 0}}, /* PH[ 7.. 7] LIN_Rx in */ |
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83 | {120, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 8..11] LIN_SLP,RST out*/ |
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84 | {121, 2, 1, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}}, /* PH[ 8..11] LIN_SLP,RST out*/ |
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85 | {120, 1, 0, {.B.PA = 0,.B.OBE = 1,.B.WPE = 0}} /* PH[ 8..11] LIN_SLP,RST out*/ |
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86 | #elif defined(MPC55XX_BOARD_PHYCORE_MPC5554) |
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87 | { 0, 4, 0, {.B.PA = 1, .B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS [0:3] */ |
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88 | { 4,24, 0, {.B.PA = 1, .B.DSC = 1 }}, /* ADDR [8 : 31] */ |
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89 | { 28,32, 0, {.B.PA = 1, .B.DSC = 1 }}, /* DATA [0 : 31] */ |
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90 | { 60, 4, 0, {.B.PA = 1, .B.DSC = 1, }}, /* TSIZ[0:1], RD_!WR, BDIP */ |
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91 | { 64, 6, 0, {.B.PA = 1, .B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* RD_!WR, BDIP, !WE, !OE, !TS */ |
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92 | { 89, 4, 0, {.B.PA = 1 }}, /* ESCI_A and ESCI_B */ |
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93 | {229, 4, 0, { .B.OBE= 1,.B.DSC = 1 }} /* CLKOUT */ |
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94 | #elif defined(MPC55XX_BOARD_MPC5566EVB) |
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95 | { 0, 1, 0, {.B.PA = 1,.B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS [0] */ |
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96 | { 3, 1, 0, {.B.PA = 1,.B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* !CS [3] */ |
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97 | { 4,24, 0, {.B.PA = 1,.B.DSC = 1 }}, /* ADDR [8 : 31] */ |
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98 | { 28,16, 0, {.B.PA = 1,.B.DSC = 1 }}, /* DATA [0 : 15] */ |
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99 | { 62, 8, 0, {.B.PA = 1,.B.DSC = 1,.B.WPE=1,.B.WPS=1}}, /* RD_!WR, BDIP, |
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100 | !WE, !OE, !TS */ |
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101 | { 89, 2, 0, {.B.PA = 1 }} /* ESCI_B */ |
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102 | #elif defined(MPC55XX_BOARD_MPC5674FEVB) |
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103 | { 89, 2, 0, { .B = { .PA = 1 } } }, /* ESCI_A */ |
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104 | { 256, 1, 0, { .B = { .PA = 1, .DSC = 1 } } }, /* D_CS0 */ |
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105 | { 257, 1, 0, { .B = { .PA = 2, .DSC = 1 } } }, /* D_ADD_DAT31 */ |
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106 | { 259, 4, 0, { .B = { .PA = 1, .DSC = 1 } } }, /* D_ADD12 .. D_ADD15 */ |
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107 | { 263, 15, 0, { .B = { .PA = 2, .DSC = 1 } } }, /* D_ADD_DAT16 .. D_ADD_DAT30 */ |
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108 | { 278, 16, 0, { .B = { .PA = 1, .DSC = 1 } } }, /* D_ADD_DAT0 .. D_ADD_DAT15 */ |
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109 | { 294, 6, 0, { .B = { .PA = 1, .DSC = 1 } } }, /* D_RD_WR, D_WE0, D_WE1, D_OE, D_TS, D_ALE */ |
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110 | { 301, 1, 0, { .B = { .PA = 1, .DSC = 1 } } }, /* D_CS1 */ |
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111 | { 302, 6, 0, { .B = { .PA = 1, .DSC = 1 } } } /* D_BDIP, D_WE2, D_WE3, D_ADD9 .. D_ADD11 */ |
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112 | #elif defined(MPC55XX_BOARD_MPC5674F_ECU508) \ |
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113 | && defined(MPC55XX_NEEDS_LOW_LEVEL_INIT) |
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114 | { 196, 2, 0, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } }, /* EMIOS17 .. EMIOS18 (5VS_EN, 80V_EN) */ |
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115 | { 200, 4, 0, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } }, /* EMIOS21 .. EMIOS24 (\KS_RST, \LS_RST, \IGNINJ_RST, \INJDI_RST) */ |
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116 | { 204, 1, 1, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } }, /* EMIOS25 (HBR12_RST) */ |
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117 | { 244, 2, 0, { .B = { .PA = 1 } } }, /* ESCI_C */ |
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118 | { 256, 1, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_CS0 */ |
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119 | { 257, 1, 0, { .B = { .PA = 2, .DSC = 1 } } }, /* D_ADD_DAT31 */ |
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120 | { 258, 1, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_CS3 */ |
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121 | { 259, 4, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_ADD12 .. D_ADD15 */ |
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122 | { 263, 15, 0, { .B = { .PA = 2, .DSC = 1 } } }, /* D_ADD_DAT16 .. D_ADD_DAT30 */ |
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123 | { 278, 16, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_ADD_DAT0 .. D_ADD_DAT15 */ |
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124 | { 294, 6, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_RD_WR, D_WE0, D_WE1, D_OE, D_TS, D_ALE */ |
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125 | { 301, 1, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_CS1 */ |
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126 | { 302, 3, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_BDIP, D_WE2, D_WE3 */ |
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127 | { 305, 3, 0, { .B = { .PA = 1, .DSC = 0 } } }, /* D_ADD9 .. D_ADD11 */ |
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128 | { 432, 1, 1, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } }, /* EMIOS26 (HBR34_RST) */ |
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129 | { 433, 1, 0, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } } /* EMIOS27 (\ETH_RST) */ |
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130 | #elif defined(MPC55XX_BOARD_MPC5674F_RSM6) |
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131 | { 89, 1, 0, { .B = { .PA = 1, .OBE = 1, .IBE = 1, .WPE = 1, .WPS = 1 } } }, /* TXD_A (ESCI_A)*/ |
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132 | { 90, 1, 0, { .B = { .PA = 1, .OBE = 0, .IBE = 1, .WPE = 1, .WPS = 1 } } }, /* RXD_A (ESCI_A)*/ |
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133 | { 256, 1, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_CS0 */ |
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134 | { 257, 1, 0, { .B = { .PA = 2, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_ADD_DAT31 */ |
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135 | { 258, 1, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_CS3 */ |
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136 | { 259, 4, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_ADD12 .. D_ADD15 */ |
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137 | { 263, 15, 0, { .B = { .PA = 2, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_ADD_DAT16 .. D_ADD_DAT30 */ |
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138 | { 278, 16, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_ADD_DAT0 .. D_ADD_DAT15 */ |
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139 | { 294, 6, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_RD_WR, D_WE0, D_WE1, D_OE, D_TS, D_ALE */ |
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140 | { 301, 1, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_CS1 */ |
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141 | { 302, 3, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } }, /* D_BDIP, D_WE2, D_WE3 */ |
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142 | { 305, 3, 0, { .B = { .PA = 1, .DSC = 3, .WPE = 1, .WPS = 1 } } } /* D_ADD9 .. D_ADD11 */ |
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143 | #endif |
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144 | }; |
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145 | |
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146 | const size_t mpc55xx_start_config_siu_pcr_count [] = { |
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147 | RTEMS_ARRAY_SIZE(mpc55xx_start_config_siu_pcr) |
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148 | }; |
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