source: rtems/bsps/powerpc/motorola_powerpc/start/bspstart.c @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 19, 2018 at 7:09:51 AM

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

  • Property mode set to 100644
File size: 9.9 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-2007.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 */
16
17#include <string.h>
18
19#include <bsp.h>
20#include <bsp/bootcard.h>
21#include <rtems/bspIo.h>
22#include <rtems/counter.h>
23#include <rtems/sysinit.h>
24#include <bsp/consoleIo.h>
25#include <libcpu/spr.h>
26#include <bsp/residual.h>
27#include <bsp/pci.h>
28#include <bsp/openpic.h>
29#include <bsp/irq.h>
30#include <libcpu/bat.h>
31#include <libcpu/pte121.h>
32#include <libcpu/cpuIdent.h>
33#include <bsp/vectors.h>
34#include <bsp/VME.h>
35#include <bsp/motorola.h>
36#include <rtems/powerpc/powerpc.h>
37
38extern void _return_to_ppcbug(void);
39extern unsigned long __rtems_end[];
40extern void L1_caches_enables(void);
41extern unsigned get_L2CR(void);
42extern void set_L2CR(unsigned);
43extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
44extern void                     BSP_pgtbl_activate(Triv121PgTbl);
45
46SPR_RW(SPRG1)
47
48#if defined(DEBUG_BATS)
49extern void ShowBATS(void);
50#endif
51
52/*
53 *  Driver configuration parameters
54 */
55uint32_t   bsp_clicks_per_usec;
56
57/*
58 * Copy of residuals passed by firmware
59 */
60RESIDUAL residualCopy;
61/*
62 * Copy Additional boot param passed by boot loader
63 */
64#define MAX_LOADER_ADD_PARM 80
65char loaderParam[MAX_LOADER_ADD_PARM];
66
67char *BSP_commandline_string = loaderParam;
68/*
69 * Vital Board data Start using DATA RESIDUAL
70 */
71/*
72 * Total memory using RESIDUAL DATA
73 */
74unsigned int BSP_mem_size;
75
76/*
77 * PCI Bus Frequency
78 */
79unsigned int BSP_bus_frequency;
80/*
81 * processor clock frequency
82 */
83unsigned int BSP_processor_frequency;
84/*
85 * Time base divisior (how many tick for 1 second).
86 */
87unsigned int BSP_time_base_divisor;
88
89/*
90 *  Use the shared implementations of the following routines
91 */
92
93char *save_boot_params(
94  void *r3,
95  void *r4,
96  void *r5,
97  char *cmdline_start,
98  char *cmdline_end
99)
100{
101
102  residualCopy = *(RESIDUAL *)r3;
103  strncpy(loaderParam, cmdline_start, MAX_LOADER_ADD_PARM);
104  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
105  return loaderParam;
106}
107
108#if defined(mvme2100)
109unsigned int EUMBBAR;
110
111/*
112 * Return the current value of the Embedded Utilities Memory Block Base Address
113 * Register (EUMBBAR) as read from the processor configuration register using
114 * Processor Address Map B (CHRP).
115 */
116static unsigned int get_eumbbar(void) {
117  out_le32( (volatile uint32_t *)0xfec00000, 0x80000078 );
118  return in_le32( (volatile uint32_t *)0xfee00000 );
119}
120#endif
121
122uint32_t _CPU_Counter_frequency(void)
123{
124  return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
125}
126
127/*
128 *  bsp_start
129 *
130 *  This routine does the bulk of the system initialization.
131 */
132
133void bsp_start( void )
134{
135#if !defined(mvme2100)
136  unsigned l2cr;
137#endif
138  uintptr_t intrStackStart;
139  uintptr_t intrStackSize;
140  prep_t boardManufacturer;
141  motorolaBoard myBoard;
142  Triv121PgTbl  pt=0;
143
144  /*
145   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
146   * function store the result in global variables so that it can be used
147   * later...
148   */
149  get_ppc_cpu_type();
150  get_ppc_cpu_revision();
151
152  /*
153   * Init MMU block address translation to enable hardware access
154   */
155
156#if !defined(mvme2100)
157  /*
158   * PC legacy IO space used for inb/outb and all PC compatible hardware
159   */
160  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
161#endif
162
163  /*
164   * PCI devices memory area. Needed to access OpenPIC features
165   * provided by the Raven
166   *
167   * T. Straumann: give more PCI address space
168   */
169  setdbat(2, PCI_MEM_BASE+PCI_MEM_WIN0, PCI_MEM_BASE+PCI_MEM_WIN0, 0x10000000, IO_PAGE);
170
171  /*
172   * Must have acces to open pic PCI ACK registers provided by the RAVEN
173   */
174#ifndef qemu
175  setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
176#else
177  setdbat(3, 0xb0000000, 0xb0000000, 0x10000000, IO_PAGE);
178#endif
179
180#if defined(mvme2100)
181  /* Need 0xfec00000 mapped for this */
182  EUMBBAR = get_eumbbar();
183#endif
184
185  /*
186   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
187   * relevant CPU type so that the reason why there is no use of myCpu...
188   */
189  L1_caches_enables();
190
191  select_console(CONSOLE_LOG);
192
193  /*
194   * We check that the keyboard is present and immediately
195   * select the serial console if not.
196   */
197#if defined(BSP_KBD_IOBASE)
198  { int err;
199    err = kbdreset();
200    if (err) select_console(CONSOLE_SERIAL);
201  }
202#else
203  select_console(CONSOLE_SERIAL);
204#endif
205
206
207#if !defined(mvme2100)
208  /*
209   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
210   * relevant CPU type (mpc750)...
211   */
212  l2cr = get_L2CR();
213#ifdef SHOW_LCR2_REGISTER
214  printk("Initial L2CR value = %x\n", l2cr);
215#endif
216  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
217    set_L2CR(0xb9A14000);
218#endif
219
220  /*
221   * Initialize the interrupt related settings.
222   */
223  intrStackStart = (uintptr_t)_Configuration_Interrupt_stack_area_begin;
224  intrStackSize = rtems_configuration_get_interrupt_stack_size();
225
226  /*
227   * Initialize default raw exception handlers.
228   */
229  ppc_exc_initialize(intrStackStart, intrStackSize);
230
231  boardManufacturer   =  checkPrepBoardType(&residualCopy);
232  if (boardManufacturer != PREP_Motorola) {
233    printk("Unsupported hardware vendor\n");
234    while (1);
235  }
236  myBoard = getMotorolaBoard();
237
238  printk("-----------------------------------------\n");
239  printk("Welcome to %s on %s\n", _RTEMS_version,
240                                    motorolaBoardToString(myBoard));
241  printk("-----------------------------------------\n");
242#ifdef SHOW_MORE_INIT_SETTINGS
243  printk("Residuals are located at %x\n", (unsigned) &residualCopy);
244  printk("Additionnal boot options are %s\n", loaderParam);
245  printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
246  printk("-----------------------------------------\n");
247#endif
248
249#ifdef TEST_RETURN_TO_PPCBUG
250  printk("Hit <Enter> to return to PPCBUG monitor\n");
251  printk("When Finished hit GO. It should print <Back from monitor>\n");
252  debug_getc();
253  _return_to_ppcbug();
254  printk("Back from monitor\n");
255  _return_to_ppcbug();
256#endif /* TEST_RETURN_TO_PPCBUG  */
257
258#ifdef SHOW_MORE_INIT_SETTINGS
259  printk("Going to start PCI buses scanning and initialization\n");
260#endif
261
262  pci_initialize();
263  {
264    const struct _int_map *bspmap  = motorolaIntMap(currentBoard);
265    if( bspmap ) {
266       printk("pci : Configuring interrupt routing for '%s'\n",
267          motorolaBoardToString(currentBoard));
268       FixupPCI(bspmap, motorolaIntSwizzle(currentBoard));
269    }
270    else
271       printk("pci : Interrupt routing not available for this bsp\n");
272 }
273
274#ifdef SHOW_MORE_INIT_SETTINGS
275  printk("Number of PCI buses found is : %d\n", pci_bus_count());
276#endif
277#ifdef TEST_RAW_EXCEPTION_CODE
278  printk("Testing exception handling Part 1\n");
279  /*
280   * Cause a software exception
281   */
282  __asm__ __volatile ("sc");
283  /*
284   * Check we can still catch exceptions and return coorectly.
285   */
286  printk("Testing exception handling Part 2\n");
287  __asm__ __volatile ("sc");
288
289  /*
290   * Somehow doing the above seems to clobber SPRG0 on the mvme2100.  The
291   * interrupt disable mask is stored in SPRG0. Is this a problem?
292   */
293  ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
294
295#endif
296
297/* See above */
298
299  BSP_mem_size            = residualCopy.TotalMemory;
300  BSP_bus_frequency       = residualCopy.VitalProductData.ProcessorBusHz;
301  BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz;
302  BSP_time_base_divisor   = (residualCopy.VitalProductData.TimeBaseDivisor?
303                    residualCopy.VitalProductData.TimeBaseDivisor : 4000);
304
305  /* clear hostbridge errors but leave MCP disabled -
306   * PCI config space scanning code will trip otherwise :-(
307   */
308  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
309
310  if (BSP_mem_size > 0x10000000)
311  {
312    /* Support cases of system memory size larger than 256Mb.
313     *
314     * We use BAT3 in order to obtain access to the top section of the RAM.
315     * We also need to do this just before setting up the page table because
316     * this is where the page table will be located.
317     */
318    const unsigned int mem256Count = (BSP_mem_size / 0x10000000);
319    const unsigned int BAT3Addr    = ((BSP_mem_size % 0x10000000)  ?
320                                       (mem256Count     * 0x10000000) :
321                                      ((mem256Count-1) * 0x10000000));
322    setdbat(3, BAT3Addr, BAT3Addr, 0x10000000, IO_PAGE);
323#ifdef SHOW_MORE_INIT_SETTINGS
324    printk("Setting up BAT3 for large memory support. (BAT3 --> 0x%x)\n", BAT3Addr);
325#endif
326  }
327
328  /* Allocate and set up the page table mappings
329   * This is only available on >604 CPUs.
330   *
331   * NOTE: This setup routine may modify the available memory
332   *       size. It is essential to call it before
333   *       calculating the workspace etc.
334   */
335  pt = BSP_pgtbl_setup(&BSP_mem_size);
336
337  if (!pt || TRIV121_MAP_SUCCESS != triv121PgTblMap(
338            pt, TRIV121_121_VSID,
339#ifndef qemu
340            0xfeff0000,
341#else
342            0xbffff000,
343#endif
344            1,
345            TRIV121_ATTR_IO_PAGE, TRIV121_PP_RW_PAGE)) {
346        printk("WARNING: unable to setup page tables VME "
347               "bridge must share PCI space\n");
348  }
349
350  /*
351   *  initialize the device driver parameters
352   */
353  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
354
355  /*
356   * Initalize RTEMS IRQ system
357   */
358  BSP_rtems_irq_mng_init(0);
359
360  /* Activate the page table mappings only after
361   * initializing interrupts because the irq_mng_init()
362   * routine needs to modify the text
363   */
364  if (pt) {
365#ifdef  SHOW_MORE_INIT_SETTINGS
366    printk("Page table setup finished; will activate it NOW...\n");
367#endif
368    BSP_pgtbl_activate(pt);
369    /* finally, switch off DBAT3 */
370    setdbat(3, 0, 0, 0, 0);
371  }
372
373#if defined(DEBUG_BATS)
374  ShowBATS();
375#endif
376
377#ifdef SHOW_MORE_INIT_SETTINGS
378  printk("Exit from bspstart\n");
379#endif
380}
381
382RTEMS_SYSINIT_ITEM(
383  BSP_vme_config,
384  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
385  RTEMS_SYSINIT_ORDER_MIDDLE
386);
Note: See TracBrowser for help on using the repository browser.