1 | /* |
---|
2 | * |
---|
3 | * The license and distribution terms for this file may be |
---|
4 | * found in the file LICENSE in this distribution or at |
---|
5 | * http://www.rtems.org/license/LICENSE. |
---|
6 | */ |
---|
7 | #ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H |
---|
8 | #define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H |
---|
9 | |
---|
10 | #include <bspopts.h> |
---|
11 | #include <bsp/default-initial-extension.h> |
---|
12 | |
---|
13 | #include <rtems.h> |
---|
14 | #include <libcpu/io.h> |
---|
15 | #include <bsp/vectors.h> |
---|
16 | |
---|
17 | #ifdef qemu |
---|
18 | #include <rtems/bspcmdline.h> |
---|
19 | #endif |
---|
20 | |
---|
21 | #ifdef __cplusplus |
---|
22 | extern "C" { |
---|
23 | #endif |
---|
24 | |
---|
25 | /* |
---|
26 | * diagram illustrating the role of the configuration |
---|
27 | * constants |
---|
28 | * PCI_MEM_WIN0: CPU starting addr where PCI memory space is visible |
---|
29 | * PCI_MEM_BASE: CPU address of PCI mem addr. zero. (regardless of this |
---|
30 | * address being 'visible' or not!). |
---|
31 | * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME |
---|
32 | * _VME_A32_WIN0_ON_VME: VME address of that same window |
---|
33 | * |
---|
34 | * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between |
---|
35 | * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI |
---|
36 | * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to |
---|
37 | * the base address read from PCI config.space in order to translate that |
---|
38 | * into a CPU address. |
---|
39 | * |
---|
40 | * NOTE: VME addresses should NEVER be translated using these constants! |
---|
41 | * they are strictly for BSP internal use. Drivers etc. should use |
---|
42 | * the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs). |
---|
43 | * |
---|
44 | * CPU ADDR PCI_ADDR VME ADDR |
---|
45 | * |
---|
46 | * 00000000 XXXXXXXX XXXXXXXX |
---|
47 | * ^ ^ ........ |
---|
48 | * | | |
---|
49 | * | | e.g., RAM XXXXXXXX |
---|
50 | * | | 00000000 |
---|
51 | * | | ......... ^ |
---|
52 | * | | (possible offset | |
---|
53 | * | | between pci and XXXXXXXX | ...... |
---|
54 | * | | cpu addresses) | |
---|
55 | * | v | |
---|
56 | * | PCI_MEM_BASE -------------> 00000000 --------------- | |
---|
57 | * | ........ ........ ^ | |
---|
58 | * | invisible | | |
---|
59 | * | ........ from CPU | | |
---|
60 | * v | | |
---|
61 | * PCI_MEM_WIN0 ============= first visible PCI addr | | |
---|
62 | * | | |
---|
63 | * pci devices pci window | | |
---|
64 | * visible here v v |
---|
65 | * mapped by ========== _VME_A32_WIN0_ON_PCI ======= _VME_A32_WIN0_ON_VME |
---|
66 | * vme window |
---|
67 | * VME devices hostbridge mapped by |
---|
68 | * visible here universe |
---|
69 | * ===================================================== |
---|
70 | * |
---|
71 | */ |
---|
72 | |
---|
73 | /* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */ |
---|
74 | #if defined(mvme2100) |
---|
75 | #define _IO_BASE CHRP_ISA_IO_BASE |
---|
76 | #define _ISA_MEM_BASE CHRP_ISA_MEM_BASE |
---|
77 | /* address of our ram on the PCI bus */ |
---|
78 | #define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET |
---|
79 | /* offset of pci memory as seen from the CPU */ |
---|
80 | #define PCI_MEM_BASE 0 |
---|
81 | /* where (in CPU addr. space) does the PCI window start */ |
---|
82 | #define PCI_MEM_WIN0 0x80000000 |
---|
83 | |
---|
84 | #else |
---|
85 | #define _IO_BASE PREP_ISA_IO_BASE |
---|
86 | #define _ISA_MEM_BASE PREP_ISA_MEM_BASE |
---|
87 | #ifndef qemu |
---|
88 | /* address of our ram on the PCI bus */ |
---|
89 | #define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET |
---|
90 | /* offset of pci memory as seen from the CPU */ |
---|
91 | #define PCI_MEM_BASE PREP_ISA_MEM_BASE |
---|
92 | #define PCI_MEM_WIN0 0 |
---|
93 | #else |
---|
94 | #define PCI_DRAM_OFFSET 0 |
---|
95 | #define PCI_MEM_BASE 0 |
---|
96 | #define PCI_MEM_WIN0 PREP_ISA_MEM_BASE |
---|
97 | #endif |
---|
98 | #endif |
---|
99 | |
---|
100 | |
---|
101 | /* |
---|
102 | * Base address definitions for several devices |
---|
103 | * |
---|
104 | * MVME2100 is very similar but has fewer devices and uses on-CPU EPIC |
---|
105 | * implementation of OpenPIC controller. It also cannot be probed to |
---|
106 | * find out what it is which is VERY different from other Motorola boards. |
---|
107 | */ |
---|
108 | |
---|
109 | #if defined(mvme2100) |
---|
110 | #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000) |
---|
111 | /* #define BSP_UART_IOBASE_COM1 (0xffe10000) */ |
---|
112 | #define BSP_OPEN_PIC_BASE_OFFSET 0x40000 |
---|
113 | |
---|
114 | #define MVME_HAS_DEC21140 |
---|
115 | #else |
---|
116 | #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8) |
---|
117 | #define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8) |
---|
118 | |
---|
119 | #if ! defined(qemu) |
---|
120 | #define BSP_KBD_IOBASE ((_IO_BASE)+0x60) |
---|
121 | #define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0) |
---|
122 | #endif |
---|
123 | |
---|
124 | #if defined(mvme2300) |
---|
125 | #define MVME_HAS_DEC21140 |
---|
126 | #endif |
---|
127 | #endif |
---|
128 | |
---|
129 | #define BSP_CONSOLE_PORT BSP_UART_COM1 |
---|
130 | #define BSP_UART_BAUD_BASE 115200 |
---|
131 | |
---|
132 | #if defined(MVME_HAS_DEC21140) |
---|
133 | struct rtems_bsdnet_ifconfig; |
---|
134 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1" |
---|
135 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach |
---|
136 | extern int rtems_dec21140_driver_attach(); |
---|
137 | #endif |
---|
138 | |
---|
139 | #ifdef qemu |
---|
140 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1" |
---|
141 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach |
---|
142 | extern int rtems_ne_driver_attach(); |
---|
143 | |
---|
144 | RTEMS_INLINE_ROUTINE const char* bsp_cmdline_arg(const char* arg) |
---|
145 | { |
---|
146 | return rtems_bsp_cmdline_get_param_raw(arg); |
---|
147 | } |
---|
148 | #endif |
---|
149 | |
---|
150 | #ifdef qemu |
---|
151 | #define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body |
---|
152 | extern void *bsp_ppc_idle_task_body(uintptr_t arg); |
---|
153 | #endif |
---|
154 | |
---|
155 | #include <bsp/openpic.h> |
---|
156 | /* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver |
---|
157 | * to implement VME IRQ priorities in software. |
---|
158 | * Note that this requires support by the interrupt controller |
---|
159 | * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c) |
---|
160 | * and the BSP-specific universe initialization/configuration |
---|
161 | * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c) |
---|
162 | * |
---|
163 | * ********* IMPORTANT NOTE ******** |
---|
164 | * When deriving from this file (new BSPs) |
---|
165 | * DO NOT define "BSP_PIC_DO_EOI" if you don't know what |
---|
166 | * you are doing i.e., w/o implementing the required pieces |
---|
167 | * mentioned above. |
---|
168 | * ********* IMPORTANT NOTE ******** |
---|
169 | */ |
---|
170 | #define BSP_PIC_DO_EOI openpic_eoi(0) |
---|
171 | |
---|
172 | #ifndef ASM |
---|
173 | #define outport_byte(port,value) outb(value,port) |
---|
174 | #define outport_word(port,value) outw(value,port) |
---|
175 | #define outport_long(port,value) outl(value,port) |
---|
176 | |
---|
177 | #define inport_byte(port,value) (value = inb(port)) |
---|
178 | #define inport_word(port,value) (value = inw(port)) |
---|
179 | #define inport_long(port,value) (value = inl(port)) |
---|
180 | |
---|
181 | /* |
---|
182 | * Vital Board data Start using DATA RESIDUAL |
---|
183 | */ |
---|
184 | |
---|
185 | /* |
---|
186 | * Total memory using RESIDUAL DATA |
---|
187 | */ |
---|
188 | extern unsigned int BSP_mem_size; |
---|
189 | /* |
---|
190 | * Start of the heap |
---|
191 | */ |
---|
192 | extern unsigned int BSP_heap_start; |
---|
193 | /* |
---|
194 | * PCI Bus Frequency |
---|
195 | */ |
---|
196 | extern unsigned int BSP_bus_frequency; |
---|
197 | /* |
---|
198 | * processor clock frequency |
---|
199 | */ |
---|
200 | extern unsigned int BSP_processor_frequency; |
---|
201 | /* |
---|
202 | * Time base divisior (how many tick for 1 second). |
---|
203 | */ |
---|
204 | extern unsigned int BSP_time_base_divisor; |
---|
205 | |
---|
206 | /* |
---|
207 | * String passed by the bootloader. |
---|
208 | */ |
---|
209 | extern char *BSP_commandline_string; |
---|
210 | |
---|
211 | #define BSP_Convert_decrementer( _value ) \ |
---|
212 | ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value))) |
---|
213 | |
---|
214 | /* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ |
---|
215 | extern int BSP_disconnect_clock_handler (void); |
---|
216 | extern int BSP_connect_clock_handler (void); |
---|
217 | |
---|
218 | /* clear hostbridge errors |
---|
219 | * |
---|
220 | * NOTE: The routine returns always (-1) if 'enableMCP==1' |
---|
221 | * [semantics needed by libbspExt] if the MCP input is not wired. |
---|
222 | * It returns and clears the error bits of the PCI status register. |
---|
223 | * MCP support is disabled because: |
---|
224 | * a) the 2100 has no raven chip |
---|
225 | * b) the raven (2300) would raise machine check interrupts |
---|
226 | * on PCI config space access to empty slots. |
---|
227 | */ |
---|
228 | extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet); |
---|
229 | |
---|
230 | /* |
---|
231 | * Prototypes for methods called only from .S for dependency tracking |
---|
232 | */ |
---|
233 | char *save_boot_params( |
---|
234 | void *r3, |
---|
235 | void *r4, |
---|
236 | void *r5, |
---|
237 | char *cmdline_start, |
---|
238 | char *cmdline_end |
---|
239 | ); |
---|
240 | void zero_bss(void); |
---|
241 | |
---|
242 | /* |
---|
243 | * Prototypes for BSP methods which cross file boundaries |
---|
244 | */ |
---|
245 | void VIA_isa_bridge_interrupts_setup(void); |
---|
246 | |
---|
247 | #endif |
---|
248 | |
---|
249 | #ifdef __cplusplus |
---|
250 | }; |
---|
251 | #endif |
---|
252 | |
---|
253 | #endif |
---|