source: rtems/bsps/powerpc/motorola_powerpc/include/bsp.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 8.1 KB
Line 
1/*
2 *
3 *  The license and distribution terms for this file may be
4 *  found in the file LICENSE in this distribution or at
5 *  http://www.rtems.org/license/LICENSE.
6 */
7#ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
8#define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
9
10#include <bspopts.h>
11#include <bsp/default-initial-extension.h>
12
13#include <rtems.h>
14#include <libcpu/io.h>
15#include <bsp/vectors.h>
16 
17#ifdef qemu
18#include <rtems/bspcmdline.h>
19#endif
20 
21#ifdef __cplusplus
22extern "C" {
23#endif
24
25/*
26 * diagram illustrating the role of the configuration
27 * constants
28 *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
29 *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
30 *                       address being 'visible' or not!).
31 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
32 * _VME_A32_WIN0_ON_VME: VME address of that same window
33 *
34 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
35 * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
36 * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
37 * the base address read from PCI config.space in order to translate that
38 * into a CPU address.
39 *
40 * NOTE: VME addresses should NEVER be translated using these constants!
41 *       they are strictly for BSP internal use. Drivers etc. should use
42 *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
43 *
44 *           CPU ADDR                  PCI_ADDR                                VME ADDR
45 *
46 *           00000000                  XXXXXXXX                                XXXXXXXX
47 *    ^  ^   ........
48 *    |  |
49 *    |  |  e.g., RAM                  XXXXXXXX
50 *    |  |                                                                     00000000
51 *    |  |  .........                                                          ^
52 *    |  |            (possible offset                                         |
53 *    |  |             between pci and XXXXXXXX                                | ......
54 *    |  |             cpu addresses)                                          |
55 *    |  v                                                                     |
56 *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
57 *    |     ........                   ........               ^                |
58 *    |                                invisible              |                |
59 *    |     ........                   from CPU               |                |
60 *    v                                                       |                |
61 *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
62 *                                                            |                |
63 *        pci devices   pci window                            |                |
64 *       visible here                                         v                v
65 *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
66 *                                                 vme window
67 *        VME devices   hostbridge                 mapped by
68 *       visible here                              universe
69 *                    =====================================================
70 *
71 */
72
73/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
74#if defined(mvme2100)
75#define _IO_BASE                CHRP_ISA_IO_BASE
76#define _ISA_MEM_BASE           CHRP_ISA_MEM_BASE
77/* address of our ram on the PCI bus   */
78#define PCI_DRAM_OFFSET         CHRP_PCI_DRAM_OFFSET
79/* offset of pci memory as seen from the CPU */
80#define PCI_MEM_BASE            0
81/* where (in CPU addr. space) does the PCI window start */
82#define PCI_MEM_WIN0            0x80000000
83
84#else
85#define _IO_BASE                PREP_ISA_IO_BASE
86#define _ISA_MEM_BASE           PREP_ISA_MEM_BASE
87#ifndef qemu
88/* address of our ram on the PCI bus   */
89#define PCI_DRAM_OFFSET         PREP_PCI_DRAM_OFFSET
90/* offset of pci memory as seen from the CPU */
91#define PCI_MEM_BASE            PREP_ISA_MEM_BASE
92#define PCI_MEM_WIN0            0
93#else
94#define PCI_DRAM_OFFSET         0
95#define PCI_MEM_BASE            0
96#define PCI_MEM_WIN0            PREP_ISA_MEM_BASE
97#endif
98#endif
99
100
101/*
102 *  Base address definitions for several devices
103 *
104 *  MVME2100 is very similar but has fewer devices and uses on-CPU EPIC
105 *  implementation of OpenPIC controller.  It also cannot be probed to
106 *  find out what it is which is VERY different from other Motorola boards.
107 */
108
109#if defined(mvme2100)
110#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
111/* #define BSP_UART_IOBASE_COM1     (0xffe10000) */
112#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
113
114#define MVME_HAS_DEC21140
115#else
116#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
117#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
118
119#if ! defined(qemu)
120#define BSP_KBD_IOBASE       ((_IO_BASE)+0x60)
121#define BSP_VGA_IOBASE       ((_IO_BASE)+0x3c0)
122#endif
123
124#if defined(mvme2300)
125#define MVME_HAS_DEC21140
126#endif
127#endif
128
129#define BSP_CONSOLE_PORT        BSP_UART_COM1
130#define BSP_UART_BAUD_BASE      115200
131
132#if defined(MVME_HAS_DEC21140)
133struct rtems_bsdnet_ifconfig;
134#define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1"
135#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach
136extern int rtems_dec21140_driver_attach();
137#endif
138
139#ifdef qemu
140#define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1"
141#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
142extern int rtems_ne_driver_attach();
143#endif
144
145#ifdef qemu
146#define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body
147extern void *bsp_ppc_idle_task_body(uintptr_t arg);
148#endif
149
150#include <bsp/openpic.h>
151/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver
152 * to implement VME IRQ priorities in software.
153 * Note that this requires support by the interrupt controller
154 * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c)
155 * and the BSP-specific universe initialization/configuration
156 * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c)
157 *
158 * ********* IMPORTANT NOTE ********
159 * When deriving from this file (new BSPs)
160 * DO NOT define "BSP_PIC_DO_EOI" if you don't know what
161 * you are doing i.e., w/o implementing the required pieces
162 * mentioned above.
163 * ********* IMPORTANT NOTE ********
164 */
165#define BSP_PIC_DO_EOI openpic_eoi(0)
166
167#ifndef ASM
168#define outport_byte(port,value) outb(value,port)
169#define outport_word(port,value) outw(value,port)
170#define outport_long(port,value) outl(value,port)
171
172#define inport_byte(port,value) (value = inb(port))
173#define inport_word(port,value) (value = inw(port))
174#define inport_long(port,value) (value = inl(port))
175
176/*
177 * Vital Board data Start using DATA RESIDUAL
178 */
179
180/*
181 * Total memory using RESIDUAL DATA
182 */
183extern unsigned int BSP_mem_size;
184/*
185 * Start of the heap
186 */
187extern unsigned int BSP_heap_start;
188/*
189 * PCI Bus Frequency
190 */
191extern unsigned int BSP_bus_frequency;
192/*
193 * processor clock frequency
194 */
195extern unsigned int BSP_processor_frequency;
196/*
197 * Time base divisior (how many tick for 1 second).
198 */
199extern unsigned int BSP_time_base_divisor;
200
201/*
202 * String passed by the bootloader.
203 */
204extern char *BSP_commandline_string;
205
206#define BSP_Convert_decrementer( _value ) \
207  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
208
209/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
210extern int BSP_disconnect_clock_handler (void);
211extern int BSP_connect_clock_handler (void);
212
213/* clear hostbridge errors
214 *
215 * NOTE: The routine returns always (-1) if 'enableMCP==1'
216 *       [semantics needed by libbspExt] if the MCP input is not wired.
217 *       It returns and clears the error bits of the PCI status register.
218 *       MCP support is disabled because:
219 *         a) the 2100 has no raven chip
220 *         b) the raven (2300) would raise machine check interrupts
221 *            on PCI config space access to empty slots.
222 */
223extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
224
225/*
226 * Prototypes for methods called only from .S for dependency tracking
227 */
228char *save_boot_params(
229  void *r3,
230  void *r4,
231  void *r5,
232  char *cmdline_start,
233  char *cmdline_end
234);
235void zero_bss(void);
236
237/*
238 * Prototypes for BSP methods which cross file boundaries
239 */
240void VIA_isa_bridge_interrupts_setup(void);
241
242#endif
243
244#ifdef __cplusplus
245};
246#endif
247
248#endif
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