1 | /* A fake 'bios' which does nothing but move a kernel image |
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2 | * to RAM address zero and then starts that... |
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3 | */ |
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4 | |
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5 | #include <bsp/residual.h> |
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6 | |
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7 | #define LD_CACHE_LINE_SIZE 5 |
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8 | #define INIT_STACK (0x100 - 16) /* 16-byte/svr4 aligned */ |
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9 | |
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10 | /* These offsets must correspond to declaration in qemu_fakeres.c */ |
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11 | #define DAT_LEN 0 |
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12 | #define RES_OFF 4 |
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13 | #define CMD_OFF 8 |
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14 | #define CMD_LEN 12 |
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15 | #define IMG_ADR 16 |
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16 | |
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17 | /* Non-volatile registers */ |
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18 | #define OBASE 30 |
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19 | #define PCID 25 |
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20 | #define PCIA 26 |
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21 | |
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22 | #define PCI_MAX_DEV 32 |
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23 | |
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24 | #define BA_OPCODE(tgt) ((18<<(31-5)) | 2 | ((tgt) & 0x03fffffc)) |
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25 | |
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26 | .global fake_data |
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27 | .global res_set_memsz |
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28 | |
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29 | .global _start |
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30 | _start: |
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31 | lis 1, INIT_STACK@h |
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32 | ori 1,1,INIT_STACK@l |
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33 | |
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34 | /* qemu 0.14.1 has the wrong exception prefix for 74xx CPUs |
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35 | * (bug 811683). Work around this by putting a stub at 0x00000X00 |
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36 | * which simply jumps to high memory. We only need the SC exception |
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37 | * for now. |
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38 | */ |
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39 | lis 3, BA_OPCODE(0xfff00000)@h |
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40 | ori 3, 3, BA_OPCODE(0xfff00000)@l |
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41 | li 4, 0x0c00 |
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42 | add 3, 3, 4 |
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43 | stw 3, 0(4) |
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44 | dcbf 0, 4 |
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45 | icbi 0, 4 |
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46 | |
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47 | bl pci_irq_set |
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48 | /* copy residual to RAM and fix up; |
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49 | * this routine returns a pointer to |
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50 | * a 'fake_data' struct. If reading |
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51 | * NVRAM failed then the return value |
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52 | * points to a fall-back version in |
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53 | * ROM... |
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54 | */ |
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55 | bl res_copy |
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56 | /* fake_data pointer to R29 */ |
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57 | mr 29, 3 |
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58 | |
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59 | /* Load up R3..R5 with PreP mandated |
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60 | * values (R3: residual, R4: kernel image, |
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61 | * R5: OpenFirmware PTR (or NULL). |
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62 | */ |
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63 | |
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64 | /* load R3 with residual pointer */ |
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65 | lwz 3, RES_OFF(29) |
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66 | add 3, 3, 29 |
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67 | |
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68 | /* load R4 with image address */ |
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69 | lwz 4, IMG_ADR(29) |
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70 | |
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71 | /* load R5 with zero (OFW = NULL) */ |
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72 | li 5, 0 |
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73 | /* EXTENSION: R6 = cmdline start */ |
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74 | lwz 6, CMD_OFF(29) |
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75 | add 6, 6, 29 |
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76 | /* EXTENSION: R7 = cmdline end */ |
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77 | lwz 7, CMD_LEN(29) |
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78 | add 7, 7, 6 |
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79 | |
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80 | /* jump to image address */ |
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81 | mtctr 4 |
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82 | bctr |
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83 | |
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84 | .org 0x100 |
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85 | b _start |
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86 | |
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87 | .org 0x110 |
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88 | template: |
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89 | mfsrr0 30 |
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90 | mfsrr1 31 |
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91 | 1: b 1b |
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92 | template_end: |
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93 | |
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94 | .org 0xc00 |
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95 | b monitor |
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96 | |
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97 | |
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98 | .org 0x4000 |
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99 | codemove: /* src/dst are cache-aligned */ |
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100 | addi 5,5,(1<<LD_CACHE_LINE_SIZE)-1 |
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101 | srwi 5,5,LD_CACHE_LINE_SIZE |
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102 | addi 3,3,-4 |
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103 | addi 4,4,-4 |
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104 | 1: |
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105 | li 0, (1<<LD_CACHE_LINE_SIZE) |
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106 | mtctr 0 |
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107 | 2: |
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108 | lwzu 0, 4(3) |
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109 | stwu 0, 4(4) |
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110 | bdnz 2b |
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111 | dcbf 0,4 |
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112 | icbi 0,4 |
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113 | addic. 5,5,-1 |
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114 | bne 1b |
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115 | blr |
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116 | |
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117 | cpexc: |
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118 | lis 3,template@h |
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119 | ori 3,3,template@l |
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120 | li 5,template_end-template |
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121 | b codemove |
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122 | |
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123 | monitor: |
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124 | stwu 1,-16(1) |
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125 | stw OBASE, 8(1) |
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126 | lis OBASE, 0x80000000@h |
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127 | cmplwi 10,0x63 /* enter_monitor -> RESET */ |
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128 | bne 10f |
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129 | hwreset: |
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130 | li 3,1 |
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131 | stb 3,0x92(OBASE) |
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132 | 1: b 1b |
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133 | 10: cmplwi 10,0x1d /* .NETCTRL -> ignore */ |
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134 | bne 10f |
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135 | b ret_from_mon |
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136 | 10: b hwreset /* unknown -> RESET */ |
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137 | |
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138 | ret_from_mon: |
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139 | lwz OBASE,8(1) |
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140 | lwz 1,0(1) |
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141 | rfi |
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142 | |
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143 | rcb: |
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144 | stwbrx 3, 0, PCIA |
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145 | lbzx 3, 0, PCID |
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146 | blr |
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147 | |
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148 | wcb: |
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149 | stwbrx 3, 0, PCIA |
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150 | stbx 4, 0, PCID |
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151 | blr |
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152 | |
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153 | rcd: |
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154 | stwbrx 3, 0, PCIA |
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155 | lwbrx 3, 0, PCID |
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156 | blr |
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157 | |
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158 | /* fixup pci interrupt line register according to what |
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159 | * qemu does: line = ((pin-1) + slot_no) & 1 ? 11 : 9; |
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160 | */ |
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161 | pci_irq_set: |
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162 | /* set up stack frame */ |
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163 | stwu 1, -32(1) |
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164 | mflr 0 |
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165 | stw 0, 32+4(1) |
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166 | /* load counter with # of PCI devs */ |
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167 | li 0, PCI_MAX_DEV |
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168 | mtctr 0 |
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169 | /* save non-volatile registers we use |
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170 | * in stack frame |
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171 | */ |
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172 | stw 20, 8(1) |
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173 | stw PCIA, 12(1) |
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174 | stw PCID, 16(1) |
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175 | /* load non-volatile registers with |
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176 | * intended values. |
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177 | */ |
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178 | lis 20, 0x80000000@h /* key for slot # 0 */ |
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179 | lis PCIA, 0x80000cf8@h /* PCI config space address reg */ |
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180 | ori PCIA, PCIA, 0x80000cf8@l |
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181 | addi PCID, PCIA, 4 /* PCI config space data reg */ |
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182 | |
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183 | /* loop over all slots and fix up PCI IRQ LINE */ |
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184 | 1: |
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185 | mr 3, 20 |
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186 | bl rcd |
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187 | addi 3, 3, 1 |
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188 | cmplwi 3, 0 /* slot empty (= -1 + 1 = 0) ? */ |
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189 | beq 2f |
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190 | addi 3, 20, 0x3d |
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191 | bl rcb |
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192 | cmplwi 3, 0 |
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193 | beq 2f |
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194 | slwi 4, 3, 11 |
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195 | addi 3, 20, 0x3c |
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196 | xor 4, 4, 3 /* bit 11 = slot # + irq_num [zero-based] + 1 */ |
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197 | andi. 4, 4, 0x0800 |
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198 | li 4, 11 |
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199 | beq 3f |
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200 | li 4, 9 |
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201 | 3: |
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202 | bl wcb |
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203 | 2: |
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204 | addi 20, 20, 0x0800 /* next slot */ |
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205 | bdnz 1b |
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206 | |
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207 | /* restore and return */ |
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208 | lwz 20, 32+4(1) |
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209 | mtlr 20 |
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210 | lwz PCID, 16(1) |
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211 | lwz PCIA, 12(1) |
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212 | lwz 20, 8(1) |
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213 | lwz 1, 0(1) |
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214 | blr |
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215 | |
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216 | .section .romentry, "ax" |
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217 | b _start |
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