source: rtems/bsps/powerpc/motorola_powerpc/bootloader/em86.c @ 762fa62

5
Last change on this file since 762fa62 was 03e1d837, checked in by Sebastian Huber <sebastian.huber@…>, on 04/24/18 at 05:06:36

bsps/powerpc: Move bootloader to bsps

This bootloader is only used by the motorola_powerpc BSP.

This patch is a part of the BSP source reorganization.

Update #3285.
  • Property mode set to 100644
File size: 14.8 KB
Line 
1/*
2 *  em86.c -- Include file for bootloader.
3 */
4
5/*
6 *  Copyright (C) 1998, 1999 Gabriel Paubert, paubert@iram.es
7 *
8 *  Modified to compile in RTEMS development environment
9 *  by Eric Valette
10 *
11 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.org/license/LICENSE.
16 */
17
18/*****************************************************************************
19*
20* Code to interpret Video BIOS ROM routines.
21*
22*
23******************************************************************************/
24
25/* These include are for the development version only */
26#include <sys/types.h>
27#include "pci.h"
28#include <libcpu/byteorder.h>
29#ifdef __BOOT__
30#include "bootldr.h"
31#include <limits.h>
32#include <rtems/bspIo.h>
33#endif
34
35/* Code options,  put them on the compiler command line */
36/* #define EIP_STATS */ /* EIP based profiling */
37/* #undef EIP_STATS */
38
39typedef union _reg_type1 {
40        unsigned e;
41        unsigned short x;
42        struct {
43                unsigned char l, h;
44        } lh;
45} reg_type1;
46
47typedef union _reg_type2 {
48        uint32_t e;
49        uint16_t x;
50} reg_type2;
51
52typedef struct _x86 {
53        reg_type1
54          _eax, _ecx, _edx, _ebx;
55        reg_type2
56          _esp, _ebp, _esi, _edi;
57        unsigned
58          es, cs, ss, ds, fs, gs, eip, eflags;
59        unsigned char
60          *esbase, *csbase, *ssbase, *dsbase, *fsbase, *gsbase;
61        volatile unsigned char *iobase;
62        unsigned char *ioperm;
63        unsigned
64          reason, nexteip, parm1, parm2, opcode, base;
65        unsigned *optable, opreg; /* no more used! */
66        unsigned char* vbase;
67        unsigned instructions;
68#ifdef __BOOT__
69        u_char * ram;
70        u_char * rom;
71        struct pci_dev * dev;
72#else
73        unsigned filler[14]; /* Skip to  next 64 byte boundary */
74        unsigned eipstats[32768][2];
75#endif
76} x86;
77
78x86 v86_private __attribute__((aligned(32)));
79
80/* Emulator is in another source file */
81extern
82void em86_enter(x86 * p);
83
84#define EAX (p->_eax.e)
85#define ECX (p->_ecx.e)
86#define EDX (p->_edx.e)
87#define EBX (p->_ebx.e)
88#define ESP (p->_esp.e)
89#define EBP (p->_ebp.e)
90#define ESI (p->_esi.e)
91#define EDI (p->_edi.e)
92#define AX (p->_eax.x)
93#define CX (p->_ecx.x)
94#define DX (p->_edx.x)
95#define BX (p->_ebx.x)
96#define SP (p->_esp.x)
97#define BP (p->_ebp.x)
98#define SI (p->_esi.x)
99#define DI (p->_edi.x)
100#define AL (p->_eax.lh.l)
101#define CL (p->_ecx.lh.l)
102#define DL (p->_edx.lh.l)
103#define BL (p->_ebx.lh.l)
104#define AH (p->_eax.lh.h)
105#define CH (p->_ecx.lh.h)
106#define DH (p->_edx.lh.h)
107#define BH (p->_ebx.lh.h)
108
109/* Function used to debug */
110#ifdef __BOOT__
111#define printf printk
112#endif
113#ifdef DEBUG
114static void dump86(x86 * p){
115        unsigned char *s = p->csbase + p->eip;
116        printf("cs:eip=%04x:%08x, eax=%08x, ecx=%08x, edx=%08x, ebx=%08x\n",
117               p->cs, p->eip, ld_le32(&EAX),
118               ld_le32(&ECX), ld_le32(&EDX), ld_le32(&EBX));
119        printf("ss:esp=%04x:%08x, ebp=%08x, esi=%08x, edi=%08x, efl=%08x\n",
120               p->ss, ld_le32(&ESP), ld_le32(&EBP),
121               ld_le32(&ESI), ld_le32(&EDI), p->eflags);
122        printf("nip=%08x, ds=%04x, es=%04x, fs=%04x, gs=%04x, total=%d\n",
123               p->nexteip, p->ds, p->es, p->fs, p->gs, p->instructions);
124        printf("code: %02x %02x %02x %02x %02x %02x "
125               "%02x %02x %02x %02x %02x %02x\n",
126               s[0], s[1], s[2], s[3], s[4], s[5],
127               s[6], s[7], s[8], s[9], s[10], s[11]);
128#ifndef __BOOT__
129        printf("op1=%08x, op2=%08x, result=%08x, flags=%08x\n",
130               p->filler[11], p->filler[12], p->filler[13], p->filler[14]);
131#endif
132}
133#else
134#define dump86(x)
135#endif
136
137static int bios86pci(x86 * p) {
138        unsigned reg=ld_le16(&DI);
139        reg_type2 tmp;
140
141        if (AL>=8 && AL<=13 && reg>0xff) {
142                AH = PCIBIOS_BAD_REGISTER_NUMBER;
143        } else {
144                switch(AL) {
145                case 2: /* find_device */
146                  /* Should be improved for BIOS able to handle
147                   * multiple devices. We simply suppose the BIOS
148                   * inits a single device, and return an error
149                   * if it tries to find more...
150                   */
151                  if (SI) {
152                        AH=PCIBIOS_DEVICE_NOT_FOUND;
153                  } else {
154                        BH = p->dev->bus->number;
155                        BL = p->dev->devfn;
156                        AH = 0;
157                  }
158                  break;
159                /*
160                case 3: find_class not implemented for now.
161                */
162                case 8:       /* read_config_byte */
163                  AH=pcibios_read_config_byte(BH, BL, reg, &CL);
164                  break;
165                case 9:       /* read_config_word */
166                  AH=pcibios_read_config_word(BH, BL, reg, &tmp.x);
167                  CX=ld_le16(&tmp.x);
168                  break;
169                case 10:      /* read_config_dword */
170                  AH=pcibios_read_config_dword(BH, BL, reg, &tmp.e);
171                  ECX=ld_le32(&tmp.e);
172                  break;
173                case 11:      /* write_config_byte */
174                  AH=pcibios_write_config_byte(BH, BL, reg, CL);
175                  break;
176                case 12:      /* write_config_word */
177                  AH=pcibios_write_config_word(BH, BL, reg, ld_le16(&CX));
178                  break;
179                case 13:      /* write_config_dword */
180                  AH=pcibios_write_config_dword(
181                        BH, BL, reg, ld_le32((uint32_t *)&ECX));
182                  break;
183                default:
184                  printf("Unimplemented or illegal PCI service call #%d!\n",
185                         AL);
186                  return 1;
187                }
188        }
189        p->eip = p->nexteip;
190        /* Set/clear carry according to result */
191        if (AH) p->eflags |= 1; else p->eflags &=~1;
192        return 0;
193}
194
195static void push2(x86 *p, unsigned value) {
196        unsigned char * sbase= p->ssbase;
197        unsigned newsp = (ld_le16(&SP)-2)&0xffff;
198        st_le16(&SP,newsp);
199        st_le16((unsigned short *)(sbase+newsp), value);
200}
201
202static unsigned pop2(x86 *p) {
203        unsigned char * sbase=p->ssbase;
204        unsigned oldsp = ld_le16(&SP);
205        st_le16(&SP,oldsp+2);
206        return ld_le16((unsigned short *)(sbase+oldsp));
207}
208
209static int int10h(x86 * p) { /* Process BIOS video interrupt */
210        unsigned vector;
211        vector=ld_le32((uint32_t *)p->vbase+0x10);
212        if (((vector&0xffff0000)>>16)==0xc000) {
213                push2(p, p->eflags);
214                push2(p, p->cs);
215                push2(p, p->nexteip);
216                p->cs=vector>>16;
217                p->csbase=p->vbase + (p->cs<<4);
218                p->eip=vector&0xffff;
219#if 1
220                p->eflags&=0xfcff;  /* Clear AC/TF/IF */
221#else
222                p->eflags = (p->eflags&0xfcff)|0x100;  /* Set TF for debugging */
223#endif
224                /* p->eflags|=0x100; uncomment to force a trap */
225                return(0);
226        } else {
227                switch(AH) {
228                case 0x12:
229                  switch(BL){
230                  case 0x32:
231                    p->eip=p->nexteip;
232                    return(0);
233                    break;
234                  default:
235                    break;
236                  }
237                default:
238                  break;
239                }
240                printf("unhandled soft interrupt 0x10: vector=%x\n", vector);
241                return(1);
242        }
243}
244
245static int process_softint(x86 * p) {
246#if 0
247        if (p->parm1!=0x10 || AH!=0x0e) {
248                printf("Soft interrupt\n");
249                dump86(p);
250        }
251#endif
252        switch(p->parm1) {
253        case 0x10: /* BIOS video interrupt */
254          return int10h(p);
255        case 0x1a:
256          if(AH==0xb1) return bios86pci(p);
257          break;
258        default:
259          break;
260        }
261        dump86(p);
262        printf("Unhandled soft interrupt number 0x%04x, AX=0x%04x\n",
263             p->parm1, ld_le16(&AX));
264        return(1);
265}
266
267/* The only function called back by the emulator is em86_trap, all
268   instructions may that change the code segment are trapped here.
269   p->reason is one of the following codes.  */
270#define code_zerdiv     0
271#define code_trap       1
272#define code_int3       3
273#define code_into       4
274#define code_bound      5
275#define code_ud         6
276#define code_dna        7
277
278#define code_iretw      256
279#define code_iretl      257
280#define code_lcallw     258
281#define code_lcalll     259
282#define code_ljmpw      260
283#define code_ljmpl      261
284#define code_lretw      262
285#define code_lretl      263
286#define code_softint    264
287#define code_lock       265     /* Lock prefix */
288/* Codes 1024 to 2047 are used for I/O port access instructions:
289 - The three LSB define the port size (1, 2 or 4)
290 - bit of weight 512 means out if set, in if clear
291 - bit of weight 256 means ins/outs if set, in/out if clear
292 - bit of weight 128 means use esi/edi if set, si/di if clear
293   (only used for ins/outs instructions, always clear for in/out)
294 */
295#define code_inb        1024+1
296#define code_inw        1024+2
297#define code_inl        1024+4
298#define code_outb       1024+512+1
299#define code_outw       1024+512+2
300#define code_outl       1024+512+4
301#define code_insb_a16   1024+256+1
302#define code_insw_a16   1024+256+2
303#define code_insl_a16   1024+256+4
304#define code_outsb_a16  1024+512+256+1
305#define code_outsw_a16  1024+512+256+2
306#define code_outsl_a16  1024+512+256+4
307#define code_insb_a32   1024+256+128+1
308#define code_insw_a32   1024+256+128+2
309#define code_insl_a32   1024+256+128+4
310#define code_outsb_a32  1024+512+256+128+1
311#define code_outsw_a32  1024+512+256+128+2
312#define code_outsl_a32  1024+512+256+128+4
313
314int em86_trap(x86 *p) {
315#ifndef __BOOT__
316          int i;
317          unsigned char command[80];
318          unsigned char *verb, *t;
319          unsigned short *fp;
320          static unsigned char def=0;
321          static unsigned char * bptaddr=NULL;  /* Breakpoint address */
322          static unsigned char bptopc; /* Replaced breakpoint opcode */
323          unsigned char cmd;
324          unsigned tmp;
325#endif
326          switch(p->reason) {
327          case code_int3:
328#ifndef __BOOT__
329            if(p->csbase+p->eip == bptaddr) {
330              *bptaddr=bptopc;
331              bptaddr=NULL;
332            }
333            else printf("Unexpected ");
334#endif
335            printf("Breakpoint Interrupt !\n");
336            /* Note that this fallthrough (no break;) is on purpose */
337#ifdef __BOOT__
338            return 0;
339#else
340          case code_trap:
341            dump86(p);
342            for(;;) {
343                printf("b(reakpoint, g(o, q(uit, s(tack, t(race ? [%c] ", def);
344                fgets(command,sizeof(command),stdin);
345                verb = strtok(command,"         \n");
346                if(verb) cmd=*verb; else cmd=def;
347                def=0;
348                switch(cmd) {
349                case 'b':
350                case 'B':
351                  if(bptaddr) *bptaddr=bptopc;
352                  t=strtok(0,"  \n");
353                  i=sscanf(t,"%x",&tmp);
354                  if(i==1) {
355                    bptaddr=p->vbase + tmp;
356                    bptopc=*bptaddr;
357                    *bptaddr=0xcc;
358                  } else bptaddr=NULL;
359                  break;
360                case 'q':
361                case 'Q':
362                  return 1;
363                  break;
364
365                case 'g':
366                case 'G':
367                  p->eflags &= ~0x100;
368                  return 0;
369                  break;
370
371                case 's':
372                case 'S': /* Print the 8 stack top words */
373                  fp = (unsigned short *)(p->ssbase+ld_le16(&SP));
374                  printf("Stack [%04x:%04x]: %04x %04x %04x %04x %04x %04x %04x %04x\n",
375                         p->ss, ld_le16(&SP),
376                         ld_le16(fp+0), ld_le16(fp+1), ld_le16(fp+2), ld_le16(fp+3),
377                         ld_le16(fp+4), ld_le16(fp+5), ld_le16(fp+6), ld_le16(fp+7));
378                  break;
379                case 't':
380                case 'T':
381                  p->eflags |= 0x10100;  /* Set the resume and trap flags */
382                  def='t';
383                  return 0;
384                  break;
385                  /* Should add some code to edit registers */
386                }
387            }
388#endif
389            break;
390          case code_ud:
391            printf("Attempt to execute an unimplemented"
392                   "or undefined opcode!\n");
393            dump86(p);
394            return(1); /* exit interpreter */
395            break;
396          case code_dna:
397            printf("Attempt to execute a floating point instruction!\n");
398            dump86(p);
399            return(1);
400            break;
401          case code_softint:
402            return process_softint(p);
403            break;
404          case code_iretw:
405            p->eip=pop2(p);
406            p->cs=pop2(p);
407            p->csbase=p->vbase + (p->cs<<4);
408            p->eflags= (p->eflags&0xfffe0000)|pop2(p);
409            /* p->eflags|= 0x100; */ /* Uncomment to trap after iretws */
410            return(0);
411            break;
412#ifndef __BOOT__
413          case code_inb:
414          case code_inw:
415          case code_inl:
416          case code_insb_a16:
417          case code_insw_a16:
418          case code_insl_a16:
419          case code_insb_a32:
420          case code_insw_a32:
421          case code_insl_a32:
422          case code_outb:
423          case code_outw:
424          case code_outl:
425          case code_outsb_a16:
426          case code_outsw_a16:
427          case code_outsl_a16:
428          case code_outsb_a32:
429          case code_outsw_a32:
430          case code_outsl_a32:
431            /* For now we simply enable I/O to the ports and continue */
432            for(i=p->parm1; i<p->parm1+(p->reason&7); i++) {
433              p->ioperm[i/8] &= ~(1<<i%8);
434            }
435            printf("Access to ports %04x-%04x enabled.\n",
436                   p->parm1, p->parm1+(p->reason&7)-1);
437            return(0);
438#endif
439          case code_lretw:
440            /* Check for the exit eyecatcher */
441            if ( *(u_int *)(p->ssbase+ld_le16(&SP)) == UINT_MAX) return 1;
442            /* No break on purpose */
443          default:
444            dump86(p);
445            printf("em86_trap called with unhandled reason code !\n");
446            return(1);
447
448          }
449}
450
451void cleanup_v86_mess(void) {
452        x86 *p = (x86 *) bd->v86_private;
453
454        /* This automatically removes the mappings ! */
455        vfree(p->vbase);
456        p->vbase = 0;
457        pfree(p->ram);
458        p->ram = 0;
459        sfree(p->ioperm);
460        p->ioperm=0;
461}
462
463int init_v86(void) {
464        x86 *p = (x86 *) bd->v86_private;
465
466        /* p->vbase is non null when the v86 is properly set-up */
467        if (p->vbase) return 0;
468
469        /* Set everything to 0 */
470        memset(p, 0, sizeof(*p));
471        p->ioperm = salloc(65536/8+1);
472        p->ram = palloc(0xa0000);
473        p->iobase = ptr_mem_map->io_base;
474
475        if (!p->ram || !p->ioperm) return 1;
476
477        /* The ioperm array must have an additional byte at the end ! */
478        p->ioperm[65536/8] = 0xff;
479
480        p->vbase = valloc(0x110000);
481        if (!p->vbase) return 1;
482
483        /* These calls should never fail. */
484        vmap(p->vbase, (u_long)p->ram|PTE_RAM, 0xa0000);
485        vmap(p->vbase+0x100000, (u_long)p->ram|PTE_RAM, 0x10000);
486        vmap(p->vbase+0xa0000,
487             ((u_long)ptr_mem_map->isa_mem_base+0xa0000)|PTE_IO, 0x20000);
488        return 0;
489}
490
491void em86_main(struct pci_dev *dev){
492        x86 *p = (x86 *) bd->v86_private;
493        u_short signature;
494        u_char length;
495        volatile u_int *src;
496        u_int *dst, left;
497        uint32_t saved_rom;
498#if defined(MONITOR_IO) && !defined(__BOOT__)
499#define IOMASK 0xff
500#else
501#define IOMASK 0
502#endif
503
504#ifndef __BOOT__
505        int i;
506        /* Allow or disable access to all ports */
507        for(i=0; i<65536/8; i++) p->ioperm[i]=IOMASK;
508        p->ioperm[i] = 0xff; /* Last unused byte must have this value */
509#endif
510        p->dev = dev;
511        memset(p->vbase, 0, 0xa0000);
512        /* Set up a few registers */
513        p->cs = 0xc000; p->csbase = p->vbase + 0xc0000;
514        p->ss = 0x1000; p->ssbase = p->vbase + 0x10000;
515        p->eflags=0x200;
516        st_le16(&SP,0xfffc); p->eip=3;
517
518        p->dsbase = p->esbase = p->fsbase = p->gsbase = p->vbase;
519
520        /* Follow the PCI BIOS specification */
521        AH=dev->bus->number;
522        AL=dev->devfn;
523
524        /* All other registers are irrelevant except ES:DI which
525         * should point to a PnP installation check block. This
526         * is not yet implemented due to lack of references. */
527
528        /* Store a return address of 0xffff:0xffff as eyecatcher */
529        *(u_int *)(p->ssbase+ld_le16(&SP)) = UINT_MAX;
530
531        /* Interrupt for BIOS EGA services is 0xf000:0xf065 (int 0x10) */
532        st_le32((uint32_t *)p->vbase + 0x10, 0xf000f065);
533
534        /* Enable the ROM, read it and disable it immediately */
535        pci_bootloader_read_config_dword(dev, PCI_ROM_ADDRESS, &saved_rom);
536        pci_bootloader_write_config_dword(dev, PCI_ROM_ADDRESS, 0x000c0001);
537
538        /* Check that there is an Intel ROM. Should we also check that
539         * the first instruction is a jump (0xe9 or 0xeb) ?
540         */
541        signature = *(u_short *)(ptr_mem_map->isa_mem_base+0xc0000);
542        if (signature!=0x55aa) {
543                printf("bad signature: %04x.\n", signature);
544                return;
545        }
546        /* Allocate memory and copy the video rom to vbase+0xc0000; */
547        length = ptr_mem_map->isa_mem_base[0xc0002];
548        p->rom = palloc(length*512);
549        if (!p->rom) return;
550
551        for(dst=(u_int *) p->rom,
552            src=(volatile u_int *)(ptr_mem_map->isa_mem_base+0xc0000),
553            left = length*512/sizeof(u_int);
554            left--;
555            *dst++=*src++);
556
557        /* Disable the ROM and map the copy in virtual address space, note
558         * that the ROM has to be mapped as RAM since some BIOSes (at least
559         * Cirrus) perform write accesses to their own ROM. The reason seems
560         * to be that they check that they must execute from shadow RAM
561         * because accessing the ROM prevents accessing the video RAM
562         * according to comments in linux/arch/alpha/kernel/bios32.c.
563         */
564
565        pci_bootloader_write_config_dword(dev, PCI_ROM_ADDRESS, saved_rom);
566        vmap(p->vbase+0xc0000, (u_long)p->rom|PTE_RAM, length*512);
567
568        /* Now actually emulate the ROM init routine */
569        em86_enter(p);
570
571        /* Free the acquired resources */
572        vunmap(p->vbase+0xc0000);
573        pfree(p->rom);
574}
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