source: rtems/bsps/powerpc/include/libcpu/vectors.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 * vectors.h Exception frame related contant and API.
3 *
4 *  This include file describe the data structure and the functions implemented
5 *  by rtems to handle exceptions.
6 *
7 *
8 *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
9 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
10 *
11 *  Derived from libbsp/powerpc/mbx8xx/vectors/vectors.h:
12 *
13 *  CopyRight (C) 1999 valette@crf.canon.fr
14 *
15 *  The license and distribution terms for this file may be
16 *  found in the file LICENSE in this distribution or at
17 *  http://www.rtems.org/license/LICENSE.
18 */
19#ifndef _LIBCPU_VECTORS_H
20#define _LIBCPU_VECTORS_H
21
22
23/*
24 * Size of hardware vector table.
25 */
26#define NUM_EXCEPTIONS          0x20
27
28/*
29 * The callee (high level exception code written in C)
30 * will store the Link Registers (return address) at entry r1 + 4 !!!.
31 * So let room for it!!!.
32 */
33#define LINK_REGISTER_CALLEE_UPDATE_ROOM 4
34#define SRR0_FRAME_OFFSET 8
35#define SRR1_FRAME_OFFSET 12
36#define EXCEPTION_NUMBER_OFFSET 16
37#define EXC_CR_OFFSET 20
38#define EXC_CTR_OFFSET 24
39#define EXC_XER_OFFSET 28
40#define EXC_LR_OFFSET 32
41#define GPR0_OFFSET 36
42#define GPR1_OFFSET 40
43#define GPR2_OFFSET 44
44#define GPR3_OFFSET 48
45#define GPR4_OFFSET 52
46#define GPR5_OFFSET 56
47#define GPR6_OFFSET 60
48#define GPR7_OFFSET 64
49#define GPR8_OFFSET 68
50#define GPR9_OFFSET 72
51#define GPR10_OFFSET 76
52#define GPR11_OFFSET 80
53#define GPR12_OFFSET 84
54#define GPR13_OFFSET 88
55#define GPR14_OFFSET 92
56#define GPR15_OFFSET 96
57#define GPR16_OFFSET 100
58#define GPR17_OFFSET 104
59#define GPR18_OFFSET 108
60#define GPR19_OFFSET 112
61#define GPR20_OFFSET 116
62#define GPR21_OFFSET 120
63#define GPR22_OFFSET 124
64#define GPR23_OFFSET 128
65#define GPR24_OFFSET 132
66#define GPR25_OFFSET 136
67#define GPR26_OFFSET 140
68#define GPR27_OFFSET 144
69#define GPR28_OFFSET 148
70#define GPR29_OFFSET 152
71#define GPR30_OFFSET 156
72#define GPR31_OFFSET 160
73/*
74 * maintain the EABI requested 8 bytes aligment
75 * As SVR4 ABI requires 16, make it 16 (as some
76 * exception may need more registers to be processed...)
77 */
78#define    EXCEPTION_FRAME_END 176
79
80#ifndef ASM
81
82#include <rtems.h>
83
84/*
85 * default raw exception handlers
86 */
87
88extern  void default_exception_vector_code_prolog(void);
89extern  int  default_exception_vector_code_prolog_size;
90extern  void initialize_exceptions(void);
91
92typedef void rtems_exception_handler_t (CPU_Exception_frame* excPtr);
93/*DEBUG typedef rtems_exception_handler_t cpuExcHandlerType; */
94
95/*
96 * Exception handler table.
97 *
98 * This table contains pointers to assembly-language exception handlers.
99 * The common exception prologue in vectors.S looks up an entry in this
100 * table and jumps to it.  No return address is saved, so the handlers in
101 * this table must return directly to the interrupted code.
102 *
103 * On entry to an exception handler, R1 points to a new exception stack
104 * frame in which R3, R4, and LR have been saved.  R4 holds the exception
105 * number.
106 */
107extern rtems_exception_handler_t* exception_handler_table[NUM_EXCEPTIONS];
108
109/* for compatability -- XXX remove */
110typedef rtems_exception_handler_t *cpuExcHandlerType;
111extern cpuExcHandlerType *globalExceptHdl;
112
113#endif /* ASM */
114
115#endif /* _LIBCPU_VECTORS_H */
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