1 | /* |
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2 | * io.h |
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3 | * |
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4 | * This file contains inline implementation of function to |
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5 | * deal with IO. |
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6 | * |
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7 | * It is a stripped down version of linux ppc file... |
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8 | * |
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9 | * Copyright (C) 1999 Eric Valette (valette@crf.canon.fr) |
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10 | * Canon Centre Recherche France. |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in the file LICENSE in this distribution or at |
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14 | * http://www.rtems.org/license/LICENSE. |
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15 | */ |
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16 | #ifndef _LIBCPU_IO_H |
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17 | #define _LIBCPU_IO_H |
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18 | |
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19 | |
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20 | #define PREP_ISA_IO_BASE 0x80000000 |
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21 | #define PREP_ISA_MEM_BASE 0xc0000000 |
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22 | #define PREP_PCI_DRAM_OFFSET 0x80000000 |
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23 | |
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24 | #define CHRP_ISA_IO_BASE 0xfe000000 |
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25 | #define CHRP_ISA_MEM_BASE 0xfd000000 |
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26 | #define CHRP_PCI_DRAM_OFFSET 0x00000000 |
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27 | |
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28 | /* _IO_BASE, _ISA_MEM_BASE, PCI_DRAM_OFFSET are now defined by bsp.h */ |
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29 | |
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30 | #ifndef ASM |
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31 | |
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32 | #include <bsp.h> /* for _IO_BASE & friends */ |
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33 | #include <stdint.h> |
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34 | |
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35 | /* NOTE: The use of these macros is DISCOURAGED. |
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36 | * you should consider e.g. using in_xxx / out_xxx |
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37 | * with a device specific base address that is |
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38 | * defined by the BSP. This makes drivers easier |
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39 | * to port. |
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40 | */ |
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41 | #define inb(port) in_8((uint8_t *)((port)+_IO_BASE)) |
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42 | #define outb(val, port) out_8((uint8_t *)((port)+_IO_BASE), (val)) |
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43 | #define inw(port) in_le16((uint16_t *)((port)+_IO_BASE)) |
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44 | #define outw(val, port) out_le16((uint16_t *)((port)+_IO_BASE), (val)) |
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45 | #define inl(port) in_le32((uint32_t *)((port)+_IO_BASE)) |
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46 | #define outl(val, port) out_le32((uint32_t *)((port)+_IO_BASE), (val)) |
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47 | |
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48 | /* |
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49 | * Enforce In-order Execution of I/O: |
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50 | * Acts as a barrier to ensure all previous I/O accesses have |
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51 | * completed before any further ones are issued. |
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52 | */ |
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53 | static inline void eieio(void) |
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54 | { |
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55 | __asm__ __volatile__ ("eieio"); |
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56 | } |
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57 | |
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58 | |
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59 | /* Enforce in-order execution of data I/O. |
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60 | * No distinction between read/write on PPC; use eieio for all three. |
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61 | */ |
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62 | #define iobarrier_rw() eieio() |
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63 | #define iobarrier_r() eieio() |
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64 | #define iobarrier_w() eieio() |
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65 | |
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66 | /* |
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67 | * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. |
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68 | */ |
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69 | static inline uint8_t in_8(const volatile uint8_t *addr) |
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70 | { |
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71 | uint8_t ret; |
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72 | |
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73 | __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); |
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74 | return ret; |
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75 | } |
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76 | |
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77 | static inline void out_8(volatile uint8_t *addr, uint8_t val) |
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78 | { |
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79 | __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); |
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80 | } |
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81 | |
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82 | static inline uint16_t in_le16(const volatile uint16_t *addr) |
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83 | { |
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84 | uint16_t ret; |
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85 | |
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86 | __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) : |
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87 | "r" (addr), "m" (*addr)); |
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88 | return ret; |
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89 | } |
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90 | |
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91 | static inline uint16_t in_be16(const volatile uint16_t *addr) |
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92 | { |
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93 | uint16_t ret; |
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94 | |
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95 | __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); |
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96 | return ret; |
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97 | } |
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98 | |
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99 | static inline void out_le16(volatile uint16_t *addr, uint16_t val) |
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100 | { |
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101 | __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) : |
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102 | "r" (val), "r" (addr)); |
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103 | } |
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104 | |
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105 | static inline void out_be16(volatile uint16_t *addr, uint16_t val) |
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106 | { |
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107 | __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); |
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108 | } |
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109 | |
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110 | static inline uint32_t in_le32(const volatile uint32_t *addr) |
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111 | { |
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112 | uint32_t ret; |
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113 | |
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114 | __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) : |
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115 | "r" (addr), "m" (*addr)); |
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116 | return ret; |
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117 | } |
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118 | |
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119 | static inline uint32_t in_be32(const volatile uint32_t *addr) |
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120 | { |
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121 | uint32_t ret; |
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122 | |
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123 | __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); |
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124 | return ret; |
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125 | } |
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126 | |
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127 | static inline void out_le32(volatile uint32_t *addr, uint32_t val) |
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128 | { |
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129 | __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) : |
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130 | "r" (val), "r" (addr)); |
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131 | } |
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132 | |
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133 | static inline void out_be32(volatile uint32_t *addr, uint32_t val) |
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134 | { |
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135 | __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); |
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136 | } |
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137 | |
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138 | #endif /* ASM */ |
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139 | #endif /* _LIBCPU_IO_H */ |
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