| 1 | /* dlentry.s |
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| 2 | * |
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| 3 | * This file contains the entry code for RTEMS programs starting |
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| 4 | * after download to RAM |
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| 5 | * |
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| 6 | * Author: Thomas Doerfler <td@imd.m.isar.de> |
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| 7 | * IMD Ingenieurbuero fuer Microcomputertechnik |
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| 8 | * |
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| 9 | * COPYRIGHT (c) 1998 by IMD |
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| 10 | * |
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| 11 | * Changes from IMD are covered by the original distributions terms. |
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| 12 | * This file has been derived from the papyrus BSP: |
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| 13 | * |
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| 14 | * This file contains the entry veneer for RTEMS programs |
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| 15 | * downloaded to Papyrus. |
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| 16 | * |
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| 17 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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| 18 | * |
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| 19 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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| 20 | * |
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| 21 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 22 | * without any express or implied warranty: |
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| 23 | * permission to use, copy, modify, and distribute this file |
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| 24 | * for any purpose is hereby granted without fee, provided that |
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| 25 | * the above copyright notice and this notice appears in all |
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| 26 | * copies, and that the name of i-cubed limited not be used in |
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| 27 | * advertising or publicity pertaining to distribution of the |
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| 28 | * software without specific, written prior permission. |
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| 29 | * i-cubed limited makes no representations about the suitability |
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| 30 | * of this software for any purpose. |
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| 31 | * |
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| 32 | * derived from "helas403/dlentry.S": |
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| 33 | * |
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| 34 | * Further changes to derive for the PPC405CR/GP/GPr/EX/EXr |
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| 35 | * by Michael Hamel ADInstruments Ltd 2008 |
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| 36 | */ |
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| 37 | |
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| 38 | #include <rtems/asm.h> |
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| 39 | |
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| 40 | /* |
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| 41 | * The virtex ELF link scripts support three special sections: |
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| 42 | * .entry The actual entry point |
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| 43 | * .vectors The section containing the interrupt entry veneers. |
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| 44 | */ |
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| 45 | |
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| 46 | /* |
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| 47 | * Downloaded code loads the vectors separately to 0x00000100, |
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| 48 | * so .entry can be over 256 bytes. |
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| 49 | * |
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| 50 | * The other sections are linked in the following order: |
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| 51 | * .entry |
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| 52 | * .text |
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| 53 | * .data |
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| 54 | * .bss |
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| 55 | * see linker command file for section placement |
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| 56 | * |
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| 57 | * The initial stack is set to _ISR_Stack_area_end. |
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| 58 | * |
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| 59 | * All the entry veneer has to do is to clear the BSS. |
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| 60 | */ |
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| 61 | |
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| 62 | /* |
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| 63 | * GDB likes to have debugging information for the entry veneer. |
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| 64 | * Here was some DWARF information. IMD removed it, because we |
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| 65 | * could not check, whether it was still correct. Sorry. |
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| 66 | |
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| 67 | */ |
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| 68 | |
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| 69 | |
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| 70 | .section .entry |
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| 71 | |
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| 72 | PUBLIC_VAR (start) |
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| 73 | PUBLIC_VAR (download_entry) |
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| 74 | PUBLIC_VAR (__rtems_entry_point) |
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| 75 | |
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| 76 | SYM(start): |
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| 77 | SYM(download_entry): |
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| 78 | SYM(__rtems_entry_point): |
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| 79 | |
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| 80 | .extern SYM (boot_card) |
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| 81 | |
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| 82 | bl .startup /* First word is branch to reset_entry */ |
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| 83 | |
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| 84 | |
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| 85 | /*--------------------------------------------------------------------------- |
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| 86 | * Parameters from linker |
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| 87 | *--------------------------------------------------------------------------*/ |
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| 88 | |
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| 89 | base_addr: |
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| 90 | toc_pointer: |
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| 91 | .long s.got |
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| 92 | bss_length: |
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| 93 | .long bss.size |
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| 94 | bss_addr: |
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| 95 | .long bss.start |
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| 96 | sbss_length: |
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| 97 | .long sbss.size |
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| 98 | sbss_addr: |
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| 99 | .long sbss.start |
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| 100 | stack_top: |
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| 101 | .long _ISR_Stack_area_end |
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| 102 | PUBLIC_VAR (text_addr) |
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| 103 | text_addr: |
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| 104 | .long text.start |
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| 105 | PUBLIC_VAR (text_length) |
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| 106 | text_length: |
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| 107 | .long text.size |
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| 108 | |
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| 109 | /*--------------------------------------------------------------------------- |
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| 110 | * Reset_entry. |
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| 111 | *--------------------------------------------------------------------------*/ |
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| 112 | .startup: |
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| 113 | /* Get entrypoint address in R1 so we can find linker variables */ |
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| 114 | mflr r1 |
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| 115 | |
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| 116 | /* Initialise procesor registers generally */ |
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| 117 | bl init405 |
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| 118 | |
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| 119 | /* Clear .bss and .sbss */ |
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| 120 | bl bssclr |
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| 121 | |
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| 122 | /*------------------------------------------------------------------- |
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| 123 | * C_setup. |
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| 124 | *------------------------------------------------------------------*/ |
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| 125 | lwz r1,stack_top - base_addr(r1) /* Now set R1 to stack_top */ |
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| 126 | addi r1,r1,-56-4 /* start stack at text_addr - 56 */ |
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| 127 | li r3,0 |
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| 128 | stw r3, 0(r1) /* Clear stack chain */ |
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| 129 | stw r3, 4(r1) |
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| 130 | stw r3, 8(r1) |
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| 131 | stw r3, 12(r1) |
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| 132 | |
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| 133 | bl __eabi /* Initialise EABI: sets up r2 & r13 */ |
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| 134 | |
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| 135 | li r3, 0 /* command line */ |
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| 136 | |
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| 137 | b SYM (boot_card) /* call the first C routine */ |
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| 138 | |
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| 139 | /*--------------------------------------------------------------------------- |
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| 140 | * bssclr. |
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| 141 | *--------------------------------------------------------------------------*/ |
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| 142 | bssclr: lwz r2,bss_addr-base_addr(r1) /* start of bss set by loader */ |
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| 143 | lwz r3,bss_length-base_addr(r1) /* bss length */ |
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| 144 | srwi. r3,r3,2 /* div 4 to get # of words */ |
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| 145 | li r0,0 |
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| 146 | beq dosbss /* no bss */ |
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| 147 | mtctr r3 /* set ctr reg */ |
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| 148 | subi r2,r2,4 |
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| 149 | clear_bss: stwu r0,4(r2) |
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| 150 | bdnz clear_bss /* decrement counter and loop */ |
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| 151 | |
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| 152 | dosbss: lwz r2,sbss_addr-base_addr(r1) /* start of sbss set by loader */ |
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| 153 | lwz r3,sbss_length-base_addr(r1) /* sbss length */ |
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| 154 | slwi. r3,r3,2 /* div 4 to get # of words */ |
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| 155 | subi r2,r2,4 |
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| 156 | beqlr /* no sbss */ |
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| 157 | mtctr r3 /* set ctr reg */ |
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| 158 | clear_sbss: stwu r0,4(r2) |
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| 159 | bdnz clear_sbss /* decrement counter and loop */ |
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| 160 | |
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| 161 | blr /* return */ |
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| 162 | |
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| 163 | |
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| 164 | /*--------------------------------------------------------------------------- |
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| 165 | * Generic 405 register setup |
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| 166 | *--------------------------------------------------------------------------*/ |
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| 167 | init405: |
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| 168 | li r0, 0 |
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| 169 | mtmsr r0 |
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| 170 | mticcr r0 |
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| 171 | mtdccr r0 |
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| 172 | |
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| 173 | li r3,0x7FFC # 405EX-specific |
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| 174 | mtsgr r3 # Clear guarded mode on all storage except PCIe region |
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| 175 | |
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| 176 | mtsler r0 # Storage is all big-endian |
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| 177 | mtsu0r r0 # and uncompressed |
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| 178 | |
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| 179 | iccci r3,0 # Invalidate the instruction cache |
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| 180 | li r3,1 # Enable F800 0000 to FFFF FFFF |
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| 181 | oris r3,r3,0xC000 # Enable 0000 0000 to 0FFF FFFF |
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| 182 | mticcr r3 |
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| 183 | isync |
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| 184 | |
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| 185 | li r3,0 |
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| 186 | li r4,256 # 405 has 128 or 256 32-byte lines: do 256 |
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| 187 | mtctr r4 # set loop ctr |
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| 188 | dcloop: dccci 0,r3 # invalidate line |
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| 189 | addi r3,r3,0x20 # bump to next line |
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| 190 | bdnz dcloop |
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| 191 | mtdcwr r0 # Select write-back caching |
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| 192 | lis r3,0xC000 # Enable 0000 0000 to 0FFF FFFF |
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| 193 | # mtdccr r3 # Enable data cache |
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| 194 | |
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| 195 | mtevpr r0 |
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| 196 | mtesr r0 |
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| 197 | mtxer r0 |
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| 198 | |
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| 199 | lwarx r3,r0,r0 # get some data/set resv bit |
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| 200 | stwcx. r3,r0,r0 # store out and clear resv bit |
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| 201 | |
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| 202 | lis r3,0xDEAD |
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| 203 | ori r3,r3,0xBEEF # Make distintive uninitialised value |
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| 204 | mr r4, r3 |
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| 205 | mr r5, r3 |
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| 206 | mr r6, r3 |
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| 207 | mr r7, r3 |
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| 208 | mr r8, r3 |
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| 209 | mr r9, r3 |
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| 210 | mr r10, r3 |
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| 211 | mr r11, r3 |
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| 212 | mr r12, r3 |
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| 213 | mr r13, r3 |
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| 214 | mr r14, r3 |
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| 215 | mr r15, r3 |
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| 216 | mr r16, r3 |
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| 217 | mr r17, r3 |
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| 218 | mr r18, r3 |
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| 219 | mr r19, r3 |
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| 220 | mr r20, r3 |
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| 221 | mr r21, r3 |
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| 222 | mr r22, r3 |
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| 223 | mr r23, r3 |
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| 224 | mr r24, r3 |
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| 225 | mr r25, r3 |
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| 226 | mr r26, r3 |
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| 227 | mr r27, r3 |
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| 228 | mr r28, r3 |
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| 229 | mr r29, r3 |
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| 230 | mr r30, r3 |
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| 231 | mr r31, r3 |
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| 232 | |
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| 233 | blr |
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| 234 | |
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| 235 | .L_text_e: |
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| 236 | |
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| 237 | .comm environ,4,4 |
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![[RTEMS Logo]](/images/logo.png){kind=logo}
