source: rtems/bsps/powerpc/haleakala/start/bspstart.c @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 19, 2018 at 7:09:51 AM

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

  • Property mode set to 100644
File size: 5.5 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  Author:     Thomas Doerfler <td@imd.m.isar.de>
7 *              IMD Ingenieurbuero fuer Microcomputertechnik
8 *
9 *  COPYRIGHT (c) 1998 by IMD
10 *
11 *  Changes from IMD are covered by the original distributions terms.
12 *  This file has been derived from the papyrus BSP:
13 *
14 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
15 *
16 *  COPYRIGHT (c) 1995 by i-cubed ltd.
17 *
18 *  To anyone who acknowledges that this file is provided "AS IS"
19 *  without any express or implied warranty:
20 *      permission to use, copy, modify, and distribute this file
21 *      for any purpose is hereby granted without fee, provided that
22 *      the above copyright notice and this notice appears in all
23 *      copies, and that the name of i-cubed limited not be used in
24 *      advertising or publicity pertaining to distribution of the
25 *      software without specific, written prior permission.
26 *      i-cubed limited makes no representations about the suitability
27 *      of this software for any purpose.
28 *
29 *  Modifications for spooling console driver and control of memory layout
30 *  with linker command file by
31 *              Thomas Doerfler <td@imd.m.isar.de>
32 *  for these modifications:
33 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
34 *
35 *  To anyone who acknowledges that this file is provided "AS IS"
36 *  without any express or implied warranty:
37 *      permission to use, copy, modify, and distribute this file
38 *      for any purpose is hereby granted without fee, provided that
39 *      the above copyright notice and this notice appears in all
40 *      copies. IMD makes no representations about the suitability
41 *      of this software for any purpose.
42 *
43 *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c:
44 *
45 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
46 *  On-Line Applications Research Corporation (OAR).
47 *
48 *  Modifications for PPC405GP by Dennis Ehlin
49 *
50 *  Further modified for the PPC405EX Haleakala board by
51 *  Michael Hamel ADInstruments Ltd May 2008
52 */
53#include <string.h>
54#include <fcntl.h>
55
56#include <rtems/bspIo.h>
57#include <rtems/counter.h>
58
59#include <bsp.h>
60#include <bsp/bootcard.h>
61#include <bsp/uart.h>
62#include <bsp/irq.h>
63#include <libcpu/powerpc-utility.h>
64#include <bsp/vectors.h>
65#include <ppc4xx/ppc405gp.h>
66#include <ppc4xx/ppc405ex.h>
67
68#include <stdio.h>
69/*
70 *  Driver configuration parameters
71 */
72
73/* Expected by clock.c */
74uint32_t    bsp_clicks_per_usec;
75
76/*-------------------- Haleakala-specific UART setup -------------------------*/
77
78static void
79EarlyUARTInit(int baudRate)
80{
81  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
82  int divider = BSP_UART_BAUD_BASE / baudRate;
83  up[LCR] = DLAB;    /* Access DLM/DLL */
84  up[DLL] = divider & 0x0FF;
85  up[DLM] = divider >> 8;
86  up[LCR] = CHR_8_BITS;
87  up[MCR] = DTR | RTS;
88  up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
89  up[THR] = '+';
90}
91
92
93static void
94InitUARTClock(void)
95{
96  uint32_t reg;
97  mfsdr(SDR0_UART0,reg);
98  reg &= ~0x008000FF;
99  reg |= 0x00800001;    /* Ext clock, div 1 */
100  mtsdr(SDR0_UART0,reg);
101}
102
103static void GPIO_AlternateSelect(int bitnum, int source)
104/* PPC405EX: select a GPIO function for the specified pin */
105{
106  int shift;
107  unsigned long value, mask;
108  GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
109
110  shift = (31 - bitnum) & 0xF;
111  value = (source & 3) << (shift*2);
112  mask  = 3 << (shift*2);
113  if (bitnum <= 15) {
114    gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
115    gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
116  } else {
117    gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
118    gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
119  }
120}
121
122static void Init_FPGA(void)
123{
124  /* Have to write to the FPGA to enable the UART drivers */
125  /* Have to enable CS2 as an output in GPIO to get the FPGA working */
126  mtebc(EBC0_B2CR,0xF0018000);  /* Set up CS2 at 0xF0000000 */
127  mtebc(EBC0_B2AP,0x9400C800);
128  GPIO_AlternateSelect(9,1);    /* GPIO9 = PerCS2 */
129  {
130    unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
131    unsigned long n;
132    n = *(fpgaPtr);
133    n &= ~0x00100;    /* User LEDs on */
134    n |=  0x30000;    /* UART 0 and 1 transcievers on! */
135    *fpgaPtr = n;
136  }
137}
138
139/*===================================================================*/
140
141static void
142DirectUARTWrite(const char c)
143{
144  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
145  while ((up[LSR] & THRE) == 0) { ; }
146  up[THR] = c;
147}
148
149/* We will provide our own printk output function as it may get used early */
150BSP_output_char_function_type     BSP_output_char = DirectUARTWrite;
151BSP_polling_getchar_function_type BSP_poll_char = NULL;
152
153uint32_t _CPU_Counter_frequency(void)
154{
155  return bsp_clicks_per_usec * 1000000;
156}
157
158/*===================================================================*/
159
160void bsp_start( void )
161{
162  /* Get the UART clock initialized first in case we call printk */
163
164  InitUARTClock();
165  Init_FPGA();
166  EarlyUARTInit(115200);
167
168  /*
169   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
170   * function store the result in global variables
171   * so that it can be used later...
172   */
173  get_ppc_cpu_type();
174  get_ppc_cpu_revision();
175
176  /*
177   *  initialize the device driver parameters
178   */
179
180  /* Set globals visible to clock.c */
181  /* timebase register ticks/microsecond = CPU Clk in MHz */
182  bsp_clicks_per_usec = 400;
183
184  /*
185   * Initialize default raw exception handlers.
186   */
187  ppc_exc_initialize(
188    (uintptr_t) _Configuration_Interrupt_stack_area_begin,
189    rtems_configuration_get_interrupt_stack_size()
190  );
191
192  /*
193   * Install our own set of exception vectors
194   */
195  BSP_rtems_irq_mng_init(0);
196}
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