source: rtems/bsps/powerpc/haleakala/start/bspstart.c @ 031df391

5
Last change on this file since 031df391 was 9964895, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 20, 2018 at 8:35:35 AM

bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 5.5 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  Author:     Thomas Doerfler <td@imd.m.isar.de>
7 *              IMD Ingenieurbuero fuer Microcomputertechnik
8 *
9 *  COPYRIGHT (c) 1998 by IMD
10 *
11 *  Changes from IMD are covered by the original distributions terms.
12 *  This file has been derived from the papyrus BSP:
13 *
14 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
15 *
16 *  COPYRIGHT (c) 1995 by i-cubed ltd.
17 *
18 *  To anyone who acknowledges that this file is provided "AS IS"
19 *  without any express or implied warranty:
20 *      permission to use, copy, modify, and distribute this file
21 *      for any purpose is hereby granted without fee, provided that
22 *      the above copyright notice and this notice appears in all
23 *      copies, and that the name of i-cubed limited not be used in
24 *      advertising or publicity pertaining to distribution of the
25 *      software without specific, written prior permission.
26 *      i-cubed limited makes no representations about the suitability
27 *      of this software for any purpose.
28 *
29 *  Modifications for spooling console driver and control of memory layout
30 *  with linker command file by
31 *              Thomas Doerfler <td@imd.m.isar.de>
32 *  for these modifications:
33 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
34 *
35 *  To anyone who acknowledges that this file is provided "AS IS"
36 *  without any express or implied warranty:
37 *      permission to use, copy, modify, and distribute this file
38 *      for any purpose is hereby granted without fee, provided that
39 *      the above copyright notice and this notice appears in all
40 *      copies. IMD makes no representations about the suitability
41 *      of this software for any purpose.
42 *
43 *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c:
44 *
45 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
46 *  On-Line Applications Research Corporation (OAR).
47 *
48 *  Modifications for PPC405GP by Dennis Ehlin
49 *
50 *  Further modified for the PPC405EX Haleakala board by
51 *  Michael Hamel ADInstruments Ltd May 2008
52 */
53#include <string.h>
54#include <fcntl.h>
55
56#include <rtems/bspIo.h>
57#include <rtems/counter.h>
58
59#include <bsp.h>
60#include <bsp/bootcard.h>
61#include <bsp/uart.h>
62#include <bsp/irq.h>
63#include <libcpu/powerpc-utility.h>
64#include <bsp/vectors.h>
65#include <ppc4xx/ppc405gp.h>
66#include <ppc4xx/ppc405ex.h>
67
68#include <stdio.h>
69
70LINKER_SYMBOL(intrStack_start);
71LINKER_SYMBOL(intrStack_size);
72/*
73 *  Driver configuration parameters
74 */
75
76/* Expected by clock.c */
77uint32_t    bsp_clicks_per_usec;
78
79/*-------------------- Haleakala-specific UART setup -------------------------*/
80
81static void
82EarlyUARTInit(int baudRate)
83{
84  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
85  int divider = BSP_UART_BAUD_BASE / baudRate;
86  up[LCR] = DLAB;    /* Access DLM/DLL */
87  up[DLL] = divider & 0x0FF;
88  up[DLM] = divider >> 8;
89  up[LCR] = CHR_8_BITS;
90  up[MCR] = DTR | RTS;
91  up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
92  up[THR] = '+';
93}
94
95
96static void
97InitUARTClock(void)
98{
99  uint32_t reg;
100  mfsdr(SDR0_UART0,reg);
101  reg &= ~0x008000FF;
102  reg |= 0x00800001;    /* Ext clock, div 1 */
103  mtsdr(SDR0_UART0,reg);
104}
105
106static void GPIO_AlternateSelect(int bitnum, int source)
107/* PPC405EX: select a GPIO function for the specified pin */
108{
109  int shift;
110  unsigned long value, mask;
111  GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
112
113  shift = (31 - bitnum) & 0xF;
114  value = (source & 3) << (shift*2);
115  mask  = 3 << (shift*2);
116  if (bitnum <= 15) {
117    gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
118    gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
119  } else {
120    gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
121    gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
122  }
123}
124
125static void Init_FPGA(void)
126{
127  /* Have to write to the FPGA to enable the UART drivers */
128  /* Have to enable CS2 as an output in GPIO to get the FPGA working */
129  mtebc(EBC0_B2CR,0xF0018000);  /* Set up CS2 at 0xF0000000 */
130  mtebc(EBC0_B2AP,0x9400C800);
131  GPIO_AlternateSelect(9,1);    /* GPIO9 = PerCS2 */
132  {
133    unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
134    unsigned long n;
135    n = *(fpgaPtr);
136    n &= ~0x00100;    /* User LEDs on */
137    n |=  0x30000;    /* UART 0 and 1 transcievers on! */
138    *fpgaPtr = n;
139  }
140}
141
142/*===================================================================*/
143
144static void
145DirectUARTWrite(const char c)
146{
147  volatile uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
148  while ((up[LSR] & THRE) == 0) { ; }
149  up[THR] = c;
150}
151
152/* We will provide our own printk output function as it may get used early */
153BSP_output_char_function_type     BSP_output_char = DirectUARTWrite;
154BSP_polling_getchar_function_type BSP_poll_char = NULL;
155
156/*===================================================================*/
157
158void bsp_start( void )
159{
160  /* Get the UART clock initialized first in case we call printk */
161
162  InitUARTClock();
163  Init_FPGA();
164  EarlyUARTInit(115200);
165
166  /*
167   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
168   * function store the result in global variables
169   * so that it can be used later...
170   */
171  get_ppc_cpu_type();
172  get_ppc_cpu_revision();
173
174  /*
175   *  initialize the device driver parameters
176   */
177
178  /* Set globals visible to clock.c */
179  /* timebase register ticks/microsecond = CPU Clk in MHz */
180  bsp_clicks_per_usec = 400;
181  rtems_counter_initialize_converter(bsp_clicks_per_usec * 1000000);
182
183  /*
184   * Initialize default raw exception handlers.
185   */
186  ppc_exc_initialize(
187    (uintptr_t) intrStack_start,
188    (uintptr_t) intrStack_size
189  );
190
191  /*
192   * Install our own set of exception vectors
193   */
194  BSP_rtems_irq_mng_init(0);
195}
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