1 | /*===============================================================*\ |
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2 | | Project: RTEMS support for MPC83xx | |
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3 | +-----------------------------------------------------------------+ |
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4 | | Copyright (c) 2007 | |
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5 | | Embedded Brains GmbH | |
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6 | | Obere Lagerstr. 30 | |
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7 | | D-82178 Puchheim | |
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8 | | Germany | |
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9 | | rtems@embedded-brains.de | |
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10 | +-----------------------------------------------------------------+ |
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11 | | The license and distribution terms for this file may be | |
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12 | | found in the file LICENSE in this distribution or at | |
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13 | | | |
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14 | | http://www.rtems.org/license/LICENSE. | |
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15 | | | |
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16 | +-----------------------------------------------------------------+ |
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17 | | this file contains the board specific portion | |
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18 | | of the network interface driver | |
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19 | \*===============================================================*/ |
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20 | |
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21 | #define __INSIDE_RTEMS_BSD_TCPIP_STACK__ |
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22 | |
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23 | #include <rtems.h> |
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24 | #include <rtems/rtems_bsdnet.h> |
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25 | #include <rtems/rtems_bsdnet_internal.h> |
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26 | #include <bsp.h> |
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27 | #include <bsp/tsec.h> |
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28 | #include <bsp/u-boot.h> |
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29 | #include <mpc83xx/mpc83xx.h> |
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30 | #include <string.h> |
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31 | #include <libcpu/spr.h> |
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32 | |
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33 | #if MPC83XX_CHIP_TYPE / 10 != 830 |
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34 | |
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35 | #define TSEC_IFMODE_RGMII 0 |
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36 | #define TSEC_IFMODE_GMII 1 |
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37 | |
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38 | #if defined( MPC83XX_BOARD_MPC8313ERDB) |
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39 | |
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40 | #define TSEC_IFMODE TSEC_IFMODE_RGMII |
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41 | |
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42 | #elif defined( MPC83XX_BOARD_MPC8349EAMDS) |
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43 | |
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44 | #define TSEC_IFMODE TSEC_IFMODE_GMII |
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45 | |
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46 | #elif defined( MPC83XX_BOARD_HSC_CM01) |
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47 | |
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48 | #define TSEC_IFMODE TSEC_IFMODE_RGMII |
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49 | |
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50 | #else |
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51 | |
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52 | #warning No TSEC configuration available |
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53 | |
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54 | #endif |
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55 | |
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56 | /* System Version Register */ |
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57 | #define SVR 286 |
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58 | SPR_RO( SVR) |
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59 | |
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60 | /* Processor Version Register */ |
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61 | SPR_RO( PPC_PVR) |
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62 | |
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63 | /*=========================================================================*\ |
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64 | | Function: | |
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65 | \*-------------------------------------------------------------------------*/ |
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66 | int BSP_tsec_attach |
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67 | ( |
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68 | /*-------------------------------------------------------------------------*\ |
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69 | | Purpose: | |
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70 | | attach or detach the driver | |
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71 | +---------------------------------------------------------------------------+ |
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72 | | Input Parameters: | |
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73 | \*-------------------------------------------------------------------------*/ |
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74 | struct rtems_bsdnet_ifconfig *config, /* interface configuration */ |
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75 | int attaching /* 0 = detach, else attach */ |
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76 | ) |
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77 | /*-------------------------------------------------------------------------*\ |
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78 | | Return Value: | |
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79 | | 1, if success | |
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80 | \*=========================================================================*/ |
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81 | { |
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82 | tsec_config tsec_cfg; |
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83 | int unitNumber; |
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84 | char *unitName; |
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85 | uint32_t svr = _read_SVR(); |
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86 | uint32_t pvr = _read_PPC_PVR(); |
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87 | |
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88 | memset(&tsec_cfg, 0, sizeof(tsec_cfg)); |
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89 | config->drv_ctrl = &tsec_cfg; |
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90 | |
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91 | /* |
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92 | * Parse driver name |
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93 | */ |
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94 | if((unitNumber = rtems_bsdnet_parse_driver_name(config, &unitName)) < 0) { |
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95 | return 0; |
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96 | } |
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97 | |
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98 | tsec_cfg.reg_ptr = &mpc83xx.tsec [unitNumber - 1]; |
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99 | tsec_cfg.mdio_ptr = &mpc83xx.tsec [0]; |
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100 | |
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101 | if (attaching) { |
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102 | #if (TSEC_IFMODE==TSEC_IFMODE_GMII) |
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103 | #if !defined(MPC83XX_BOARD_HSC_CM01) |
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104 | |
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105 | /* |
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106 | * do not change system I/O configuration registers on HSC board |
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107 | * because should initialize from RCW |
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108 | */ |
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109 | |
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110 | |
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111 | if (unitNumber == 1) { |
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112 | /* |
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113 | * init system I/O configuration registers |
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114 | * to ensure proper pin functions |
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115 | */ |
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116 | mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x1F800000; |
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117 | /* |
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118 | * init port registers (GPIO2DIR) for TSEC1 |
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119 | */ |
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120 | mpc83xx.gpio[1].gpdir = ((mpc83xx.gpio[1].gpdir & ~0x00000FFF) |
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121 | | 0x0000001f); |
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122 | } |
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123 | if (unitNumber == 2) { |
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124 | /* |
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125 | * init system I/O configuration registers |
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126 | * to ensure proper pin functions |
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127 | */ |
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128 | mpc83xx.syscon.sicrh = mpc83xx.syscon.sicrh & ~0x007f8000; |
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129 | /* |
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130 | * init port registers (GPIO2DIR) for TSEC2 |
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131 | */ |
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132 | mpc83xx.gpio[0].gpdir = ((mpc83xx.gpio[0].gpdir & ~0x000FFFFF) |
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133 | | 0x00087881); |
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134 | } |
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135 | #endif /* !defined(MPC83XX_BOARD_HSC_CM01) */ |
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136 | #endif |
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137 | #if (TSEC_IFMODE==TSEC_IFMODE_RGMII) |
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138 | |
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139 | /* |
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140 | * Nothing special needed for TSEC1 operation |
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141 | */ |
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142 | #endif |
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143 | } |
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144 | /* |
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145 | * add MAC address into config->hardware_adderss |
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146 | * FIXME: get the real address we need |
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147 | */ |
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148 | if (config->hardware_address == NULL) { |
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149 | #if !defined(HAS_UBOOT) |
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150 | static char hw_addr [TSEC_COUNT][6]; |
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151 | volatile tsec_registers *reg_ptr = tsec_cfg.reg_ptr; |
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152 | |
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153 | /* read MAC address from hardware register */ |
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154 | /* we expect it htere from the boot loader */ |
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155 | config->hardware_address = hw_addr[unitNumber-1]; |
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156 | |
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157 | hw_addr[unitNumber-1][5] = (reg_ptr->macstnaddr[0] >> 24) & 0xff; |
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158 | hw_addr[unitNumber-1][4] = (reg_ptr->macstnaddr[0] >> 16) & 0xff; |
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159 | hw_addr[unitNumber-1][3] = (reg_ptr->macstnaddr[0] >> 8) & 0xff; |
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160 | hw_addr[unitNumber-1][2] = (reg_ptr->macstnaddr[0] >> 0) & 0xff; |
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161 | hw_addr[unitNumber-1][1] = (reg_ptr->macstnaddr[1] >> 24) & 0xff; |
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162 | hw_addr[unitNumber-1][0] = (reg_ptr->macstnaddr[1] >> 16) & 0xff; |
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163 | #endif |
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164 | |
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165 | #if defined(HAS_UBOOT) |
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166 | switch (unitNumber) { |
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167 | case 1: |
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168 | config->hardware_address = bsp_uboot_board_info.bi_enetaddr; |
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169 | break; |
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170 | |
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171 | #ifdef CONFIG_HAS_ETH1 |
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172 | case 2: |
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173 | config->hardware_address = bsp_uboot_board_info.bi_enet1addr; |
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174 | break; |
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175 | #endif /* CONFIG_HAS_ETH1 */ |
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176 | |
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177 | #ifdef CONFIG_HAS_ETH2 |
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178 | case 3: |
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179 | config->hardware_address = bsp_uboot_board_info.bi_enet2addr; |
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180 | break; |
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181 | #endif /* CONFIG_HAS_ETH2 */ |
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182 | |
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183 | #ifdef CONFIG_HAS_ETH3 |
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184 | case 4: |
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185 | config->hardware_address = bsp_uboot_board_info.bi_enet3addr; |
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186 | break; |
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187 | #endif /* CONFIG_HAS_ETH3 */ |
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188 | |
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189 | default: |
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190 | return 0; |
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191 | } |
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192 | |
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193 | #endif /* HAS_UBOOT */ |
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194 | |
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195 | } |
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196 | /* |
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197 | * set interrupt number for given interface |
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198 | */ |
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199 | config->irno = (unsigned) ( |
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200 | unitNumber == 1 |
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201 | ? BSP_IPIC_IRQ_TSEC1_TX |
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202 | : BSP_IPIC_IRQ_TSEC2_TX |
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203 | ); |
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204 | |
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205 | if (svr == 0x80b00010 && pvr == 0x80850010) { |
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206 | /* |
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207 | * This is a special case for MPC8313ERDB with silicon revision 1. Look in |
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208 | * "MPC8313ECE Rev. 3, 3/2008" errata for "IPIC 1". |
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209 | */ |
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210 | if (unitNumber == 1) { |
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211 | tsec_cfg.irq_num_tx = 37; |
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212 | tsec_cfg.irq_num_rx = 36; |
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213 | tsec_cfg.irq_num_err = 35; |
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214 | } else if (unitNumber == 2) { |
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215 | tsec_cfg.irq_num_tx = 34; |
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216 | tsec_cfg.irq_num_rx = 33; |
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217 | tsec_cfg.irq_num_err = 32; |
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218 | } else { |
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219 | return 0; |
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220 | } |
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221 | } else { |
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222 | rtems_irq_number irno = unitNumber == 1 ? |
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223 | BSP_IPIC_IRQ_TSEC1_TX : BSP_IPIC_IRQ_TSEC2_TX; |
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224 | |
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225 | /* get base interrupt number (for Tx irq, Rx=base+1,Err=base+2) */ |
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226 | tsec_cfg.irq_num_tx = irno + 0; |
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227 | tsec_cfg.irq_num_rx = irno + 1; |
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228 | tsec_cfg.irq_num_err = irno + 2; |
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229 | } |
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230 | |
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231 | /* |
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232 | * XXX: Although most hardware builders will assign the PHY addresses |
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233 | * like this, this should be more configurable |
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234 | */ |
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235 | #ifdef MPC83XX_BOARD_MPC8313ERDB |
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236 | if (unitNumber == 2) { |
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237 | tsec_cfg.phy_default = 4; |
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238 | } else { |
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239 | /* TODO */ |
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240 | return 0; |
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241 | } |
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242 | #else /* MPC83XX_BOARD_MPC8313ERDB */ |
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243 | tsec_cfg.phy_default = unitNumber-1; |
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244 | #endif /* MPC83XX_BOARD_MPC8313ERDB */ |
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245 | |
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246 | tsec_cfg.unit_number = unitNumber; |
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247 | tsec_cfg.unit_name = unitName; |
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248 | |
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249 | /* |
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250 | * call attach function of board independent driver |
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251 | */ |
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252 | return tsec_driver_attach_detach(config, attaching); |
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253 | } |
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254 | |
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255 | #endif /* MPC83XX_CHIP_TYPE / 10 != 830 */ |
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