source: rtems/bsps/powerpc/gen5200/include/bsp.h @ c991eeec

5
Last change on this file since c991eeec was c991eeec, checked in by Sebastian Huber <sebastian.huber@…>, on 03/04/19 at 14:32:15

bsps: Adjust bsp.h Doxygen groups

Update #3706.

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1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsPowerPCGen5200
5 *
6 * @brief Global BSP definitions.
7 */
8
9/*===============================================================*\
10| Project: RTEMS generic MPC5200 BSP                              |
11+-----------------------------------------------------------------+
12| Partially based on the code references which are named below.   |
13| Adaptions, modifications, enhancements and any recent parts of  |
14| the code are:                                                   |
15|                    Copyright (c) 2005                           |
16|                    Embedded Brains GmbH                         |
17|                    Obere Lagerstr. 30                           |
18|                    D-82178 Puchheim                             |
19|                    Germany                                      |
20|                    rtems@embedded-brains.de                     |
21+-----------------------------------------------------------------+
22| The license and distribution terms for this file may be         |
23| found in the file LICENSE in this distribution or at            |
24|                                                                 |
25| http://www.rtems.org/license/LICENSE.                           |
26|                                                                 |
27+-----------------------------------------------------------------+
28| this file contains board specific definitions                   |
29\*===============================================================*/
30
31#ifndef LIBBSP_POWERPC_GEN5200_BSP_H
32#define LIBBSP_POWERPC_GEN5200_BSP_H
33
34/**
35 * @defgroup RTEMSBSPsPowerPCGen5200 NXP MPC5200
36 *
37 * @ingroup RTEMSBSPsPowerPC
38 *
39 * @brief NXP MPC5200 Board Support Package.
40 *
41 * @{
42 */
43
44#include <bspopts.h>
45
46#include <libcpu/powerpc-utility.h>
47
48/*
49 * Some symbols defined in the linker command file.
50 */
51
52LINKER_SYMBOL(bsp_ram_start);
53LINKER_SYMBOL(bsp_ram_end);
54LINKER_SYMBOL(bsp_ram_size);
55
56LINKER_SYMBOL(bsp_rom_start);
57LINKER_SYMBOL(bsp_rom_end);
58LINKER_SYMBOL(bsp_rom_size);
59
60LINKER_SYMBOL(bsp_dpram_start);
61LINKER_SYMBOL(bsp_dpram_end);
62LINKER_SYMBOL(bsp_dpram_size);
63
64LINKER_SYMBOL(bsp_section_text_start);
65LINKER_SYMBOL(bsp_section_text_end);
66LINKER_SYMBOL(bsp_section_text_size);
67
68LINKER_SYMBOL(bsp_section_data_start);
69LINKER_SYMBOL(bsp_section_data_end);
70LINKER_SYMBOL(bsp_section_data_size);
71
72LINKER_SYMBOL(bsp_section_bss_start);
73LINKER_SYMBOL(bsp_section_bss_end);
74LINKER_SYMBOL(bsp_section_bss_size);
75
76LINKER_SYMBOL(bsp_work_area_start);
77
78LINKER_SYMBOL(MBAR);
79
80/* Provide legacy defines */
81
82#ifdef MPC5200_BOARD_PM520_ZE30
83#define PM520_ZE30
84#endif
85
86#ifdef MPC5200_BOARD_PM520_CR825
87#define PM520_CR825
88#endif
89
90#ifdef MPC5200_BOARD_ICECUBE
91#define icecube
92#endif
93
94#ifdef MPC5200_BOARD_BRS5L
95#define BRS5L
96#endif
97
98/*
99 * distinguish board characteristics
100 */
101/*
102 * for PM520 mdule on a ZE30 carrier
103 */
104#if defined(MPC5200_BOARD_PM520_ZE30)
105#define PM520
106#endif
107/*
108 * for PM520 mdule on a CR825 carrier
109 */
110#if defined(MPC5200_BOARD_PM520_CR825)
111#define PM520
112#endif
113
114#if !defined(HAS_UBOOT)
115  /* we need the low level initialization in start.S*/
116  #define NEED_LOW_LEVEL_INIT
117#endif
118
119#if defined(MPC5200_BOARD_BRS5L)
120/*
121 * IMD Custom Board BRS5L
122 */
123
124#define HAS_NVRAM_93CXX
125
126#elif defined(MPC5200_BOARD_BRS6L)
127  #define MPC5200_BRS6L_FPGA_BEGIN 0x800000
128  #define MPC5200_BRS6L_FPGA_SIZE (64 * 1024)
129  #define MPC5200_BRS6L_FPGA_END \
130    (MPC5200_BRS6L_FPGA_BEGIN + MPC5200_BRS6L_FPGA_SIZE)
131
132  #define MPC5200_BRS6L_MRAM_BEGIN 0xff000000
133  #define MPC5200_BRS6L_MRAM_SIZE (4 * 1024 * 1024)
134  #define MPC5200_BRS6L_MRAM_END \
135    (MPC5200_BRS6L_MRAM_BEGIN + MPC5200_BRS6L_MRAM_SIZE)
136#elif defined (PM520)
137
138/* Nothing special */
139
140#elif defined (MPC5200_BOARD_ICECUBE)
141/*
142 *  Codename: IceCube
143 *  Compatible Boards:
144 *     Freescape MPC5200LITE
145 *     Embedded Planet EP5200
146 */
147
148#elif defined (MPC5200_BOARD_DP2)
149
150/* Nothing special */
151
152#else
153#error "board type not defined"
154#endif
155
156#ifndef ASM
157
158#include <rtems.h>
159#include <bsp/i2cdrv.h>
160#include <bsp/irq.h>
161#include <bsp/vectors.h>
162#include <bsp/u-boot.h>
163#include <bsp/default-initial-extension.h>
164
165#ifdef __cplusplus
166extern "C" {
167#endif
168
169/*
170 * Network driver configuration
171 */
172struct rtems_bsdnet_ifconfig;
173extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
174#define RTEMS_BSP_NETWORK_DRIVER_NAME   "eth1"
175#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach
176
177/* miscellaneous stuff assumed to exist */
178
179/*
180 * We need to decide how much memory will be non-cacheable. This
181 * will mainly be memory that will be used in DMA (network and serial
182 * buffers).
183 */
184/*
185#define NOCACHE_MEM_SIZE 512*1024
186*/
187
188/*
189 *  Device Driver Table Entries
190 */
191
192#ifdef HAS_NVRAM_93CXX
193#define NVRAM_DRIVER_TABLE_ENTRY \
194  { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \
195    nvram_driver_read, nvram_driver_write, NULL }
196#endif
197
198/*
199 * indicate, that BSP has IDE driver
200 */
201#define RTEMS_BSP_HAS_IDE_DRIVER
202
203/* functions */
204
205/* #define SHOW_MORE_INIT_SETTINGS 1 */
206
207/* ata modes */
208/* #undef ATA_USE_INT */
209#define ATA_USE_INT
210
211/* clock settings */
212#if defined(HAS_UBOOT)
213#define IPB_CLOCK (bsp_uboot_board_info.bi_ipbfreq)
214#define XLB_CLOCK (bsp_uboot_board_info.bi_busfreq)
215#define G2_CLOCK  (bsp_uboot_board_info.bi_intfreq)
216#elif defined(MPC5200_BOARD_BRS5L) || defined(MPC5200_BOARD_BRS6L)
217#define IPB_CLOCK 66000000   /* 66 MHz */
218#define XLB_CLOCK 132000000  /* 132 MHz */
219#define G2_CLOCK  396000000  /* 396 MHz */
220#else
221#define IPB_CLOCK 33000000   /* 33 MHz */
222#define XLB_CLOCK 66000000   /* 66 MHz */
223#define G2_CLOCK  231000000  /* 231 MHz */
224#endif
225
226#if defined(HAS_UBOOT)
227#define GEN5200_CONSOLE_BAUD (bsp_uboot_board_info.bi_baudrate)
228#else
229#define GEN5200_CONSOLE_BAUD 115200
230#endif
231
232/*
233 *  Convert decrement value to tenths of microsecnds (used by
234 *  shared timer driver).
235 *
236 *    + CPU has a XLB_CLOCK bus,
237 *    + There are 4 bus cycles per click
238 *    + We return value in 1/10 microsecond units.
239 *   Modified following equation to integer equation to remove
240 *   floating point math.
241 *   (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
242 */
243
244#define BSP_Convert_decrementer( _value ) \
245  (int) (((_value) * 4000) / (XLB_CLOCK/10000))
246
247/* slicetimer settings */
248#define USE_SLICETIMER_0     TRUE
249#define USE_SLICETIMER_1     FALSE
250
251void *bsp_idle_thread( uintptr_t ignored );
252#define BSP_IDLE_TASK_BODY bsp_idle_thread
253
254/* BSP specific IRQ Benchmarking support */
255void BSP_IRQ_Benchmarking_Reset(void);
256void BSP_IRQ_Benchmarking_Report(void);
257
258#if defined(HAS_UBOOT)
259  /* Routine to obtain U-Boot environment variables */
260  const char *bsp_uboot_getenv(
261    const char *name
262  );
263#endif
264
265void cpu_init(void);
266
267int mpc5200_eth_mii_read(
268  int phyAddr,
269  void *arg,
270  unsigned regAddr,
271  uint32_t *retVal
272);
273
274#ifdef __cplusplus
275}
276#endif
277
278#endif /* ASM */
279
280/** @} */
281
282#endif /* GEN5200 */
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