1 | /*===============================================================*\ |
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2 | | Project: RTEMS generic MPC5200 BSP | |
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3 | +-----------------------------------------------------------------+ |
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4 | | Copyright (c) 2005 | |
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5 | | Embedded Brains GmbH | |
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6 | | Obere Lagerstr. 30 | |
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7 | | D-82178 Puchheim | |
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8 | | Germany | |
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9 | | rtems@embedded-brains.de | |
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10 | +-----------------------------------------------------------------+ |
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11 | | The license and distribution terms for this file may be | |
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12 | | found in the file LICENSE in this distribution or at | |
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13 | | | |
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14 | | http://www.rtems.org/license/LICENSE. | |
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15 | | | |
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16 | +-----------------------------------------------------------------+ |
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17 | | this file contains the IDE configuration | |
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18 | \*===============================================================*/ |
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19 | #include <rtems.h> |
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20 | #include <bsp.h> |
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21 | #include <bsp/irq.h> |
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22 | #include <bsp/mpc5200.h> |
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23 | #include "./pcmcia_ide.h" |
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24 | |
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25 | #include <libchip/ide_ctrl.h> |
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26 | #include <libchip/ide_ctrl_cfg.h> |
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27 | #include <libchip/ide_ctrl_io.h> |
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28 | |
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29 | /* |
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30 | * The following table configures the IDE driver used in this BSP. |
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31 | */ |
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32 | extern ide_ctrl_fns_t mpc5200_pcmciaide_ctrl_fns; |
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33 | |
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34 | volatile uint32_t * mpc5200_ata_drive_regs[] = |
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35 | { |
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36 | (uint32_t *)&(mpc5200.ata_ddr), /* data (offset 0x00) */ |
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37 | (uint32_t *)&(mpc5200.ata_dfr_der), /* features / error (offset 0x01) */ |
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38 | (uint32_t *)&(mpc5200.ata_dscr), /* sector count (offset 0x02) */ |
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39 | (uint32_t *)&(mpc5200.ata_dsnr), /* sector no. / lba0 (offset 0x03) */ |
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40 | (uint32_t *)&(mpc5200.ata_dclr), /* cylinder low / lba1 (offset 0x04) */ |
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41 | (uint32_t *)&(mpc5200.ata_dchr), /* cylinder high/ lba2 (offset 0x05) */ |
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42 | (uint32_t *)&(mpc5200.ata_ddhr), /* device head / lba3 (offset 0x06) */ |
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43 | (uint32_t *)&(mpc5200.ata_dcr_dsr), /* command /status (offset 0x07) */ |
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44 | |
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45 | (uint32_t *)&(mpc5200.ata_dctr_dasr), /* device control / alternate status (offset 0x08) */ |
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46 | (uint32_t *)&(mpc5200.ata_ddr), /* (offset 0x09) */ |
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47 | (uint32_t *)&(mpc5200.ata_ddr), /* (offset 0x0A) */ |
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48 | NULL, /* (offset 0x0B) */ |
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49 | NULL, /* (offset 0x0C) */ |
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50 | NULL, /* (offset 0x0D) */ |
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51 | NULL, /* (offset 0x0E) */ |
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52 | NULL /* (offset 0x0F) */ |
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53 | }; |
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54 | |
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55 | /* IDE controllers Table */ |
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56 | ide_controller_bsp_table_t IDE_Controller_Table[] = |
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57 | { |
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58 | { |
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59 | "/dev/idepcmcia", |
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60 | IDE_CUSTOM, /* PCMCIA Flash cards emulate custom IDE controller */ |
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61 | &mpc5200_pcmciaide_ctrl_fns, /* pointer to function set used for IDE drivers in this BSP */ |
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62 | NULL, /* no BSP dependent probe needed */ |
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63 | FALSE, /* not (yet) initialized */ |
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64 | (uint32_t)0, /* no port address but custom reg.set in params is used */ |
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65 | #ifdef ATA_USE_INT |
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66 | TRUE, /* interrupt driven */ |
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67 | #else |
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68 | FALSE, /* non interrupt driven */ |
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69 | #endif |
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70 | BSP_SIU_IRQ_ATA, /* interrupt vector */ |
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71 | NULL /* no additional parameters */ |
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72 | } |
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73 | }; |
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74 | |
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75 | /* Number of rows in IDE_Controller_Table */ |
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76 | unsigned long IDE_Controller_Count = sizeof(IDE_Controller_Table)/sizeof(IDE_Controller_Table[0]); |
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77 | |
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78 | uint32_t ata_pio_timings[2][6] = |
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79 | { |
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80 | /* PIO3 timings in nanosconds */ |
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81 | { |
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82 | 180, /* t0 cycle time */ |
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83 | 80, /* t2 DIOR-/DIOW pulse width 8 bit */ |
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84 | 80, /* t1 DIOR-/DIOW pulse width 16 bit */ |
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85 | 10, /* t4 DIOW- data hold */ |
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86 | 30, /* t1 Addr.valid to DIOR-/DIOW setup */ |
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87 | 35, /* ta IORDY setup time */ |
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88 | }, |
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89 | /* PIO4 timings in nanosconds */ |
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90 | { |
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91 | 120, /* t0 cycle time */ |
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92 | 70, /* t1 DIOR-/DIOW pulse width 8 bit */ |
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93 | 70, /* t1 DIOR-/DIOW pulse width 16 bit */ |
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94 | 10, /* t4 DIOW- data hold */ |
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95 | 25, /* t1 Addr.valid to DIOR-/DIOW setup */ |
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96 | 35, /* ta IORDY setup time */ |
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97 | } |
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98 | }; |
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99 | |
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100 | |
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