source: rtems/bsps/powerpc/beatnik/net/porting/rtemscompat_defs.h.template @ 031df391

5
Last change on this file since 031df391 was 031df391, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 23, 2018 at 7:53:31 AM

bsps: Move legacy network drivers to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 3.2 KB
Line 
1#ifndef RTEMS_COMPAT_DEFS_H
2#define RTEMS_COMPAT_DEFS_H
3
4/* Symbol definitions for a particular driver */
5
6/* Copyright: Till Straumann <strauman@slac.stanford.edu>, 2005;
7 * License:   see LICENSE file.
8 */
9
10/* Number of device instances the driver should support
11 * - may be limited to 1 depending on IRQ API
12 * (braindamaged PC586 and powerpc)
13 */
14#define NETDRIVER_SLOTS 1
15/* String name to print with error messages */
16#define NETDRIVER       "PCN"
17/* Name snippet used to make global symbols unique to this driver */
18#define NETDRIVER_PREFIX pcn
19
20/* Define according to endianness of the *ethernet*chip*
21 * (not the CPU - most probably are LE)
22 * This must be either NET_CHIP_LE or NET_CHIP_BE
23 */
24
25#define NET_CHIP_LE
26#undef  NET_CHIP_BE
27
28/* Define either NET_CHIP_MEM_IO or NET_CHIP_PORT_IO,
29 * depending whether the CPU sees it in memory address space
30 * or (e.g. x86) uses special I/O instructions.
31 */
32#define NET_CHIP_MEM_IO
33#undef  NET_CHIP_PORT_IO
34
35/* The name of the hijacked 'bus handle' field in the softc
36 * structure. We use this field to store the chip's base address.
37 */
38#define NET_SOFTC_BHANDLE_FIELD pcn_bhandle
39
40/* define the names of the 'if_XXXreg.h' and 'if_XXXvar.h' headers
41 * (only if present, i.e., if the BSDNET driver has no respective
42 * header, leave this undefined).
43 *
44 */
45#undef  IF_REG_HEADER <if_XXXreg.h>
46#undef  IF_VAR_HEADER <if_XXXvar.h>
47
48/* define if a pci device */
49#define NETDRIVER_PCI <bsp/pci.h>
50
51/* Macros to disable and enable interrupts, respectively.
52 * The 'disable' macro is expanded in the ISR, the 'enable'
53 * macro is expanded in the driver task.
54 * The global network semaphore usually provides mutex
55 * protection of the device registers.
56 * Special care must be taken when coding the 'disable' macro,
57 * however to MAKE SURE THERE ARE NO OTHER SIDE EFFECTS such
58 * as:
59 *    - macro must not clear any status flags
60 *    - macro must save/restore any context information
61 *      (e.g., a address register pointer or a bank switch register)
62 *
63 * ARGUMENT: the macro arg is a pointer to the driver's 'softc' structure
64 */
65
66/* Here EXAMPLES for the pcnet chip which addresses registers indirectly
67 * through a 'address-pointer' (RAP) and 'data-port' (RDP) register pair:
68#define NET_DISABLE_IRQS(sc)            do { \
69                unsigned rap = CSR_READ_4((sc),PCN_IO32_RAP); \
70                unsigned val; \
71                CSR_WRITE_4((sc),PCN_IO32_RAP,PCN_CSR_CSR); \
72                val = CSR_READ_4((sc),PCN_IO32_RDP); \
73                CSR_WRITE_4((sc), PCN_IO32_RDP,  val & ~(CSR0_INT_STATUS_MASK | PCN_CSR_INTEN)); \
74                CSR_WRITE_4((sc), PCN_IO32_RAP, rap); \
75                } while (0)
76
77#define NET_ENABLE_IRQS(sc)     do { \
78                unsigned flags,val;     \
79                rtems_interrupt_disable(flags); \
80                CSR_WRITE_4((sc),PCN_IO32_RAP,PCN_CSR_CSR); \
81                val = CSR_READ_4((sc),PCN_IO32_RDP); \
82                CSR_WRITE_4((sc), PCN_IO32_RDP,  (val & ~CSR0_INT_STATUS_MASK) | PCN_CSR_INTEN); \
83                rtems_interrupt_enable(flags); \
84                } while (0)
85*/
86
87/* Driver may provide a macro/function to copy the hardware address
88 * from the device into 'softc.arpcom'.
89 * If this is undefined, the driver must to the copy itself.
90 * Preferrably, it should check soft.arpcom.ac_enaddr for all
91 * zeros and leave it alone if it is nonzero, i.e., write it
92 * to the hardware.
93#define NET_READ_MAC_ADDR(sc)
94 */
95               
96#define KASSERT(a...) do {} while (0)
97#endif
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