1 | /************************************************************************** |
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2 | |
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3 | Copyright (c) 2001-2005, Intel Corporation |
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4 | All rights reserved. |
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5 | |
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6 | Redistribution and use in source and binary forms, with or without |
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7 | modification, are permitted provided that the following conditions are met: |
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8 | |
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9 | 1. Redistributions of source code must retain the above copyright notice, |
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10 | this list of conditions and the following disclaimer. |
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11 | |
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12 | 2. Redistributions in binary form must reproduce the above copyright |
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13 | notice, this list of conditions and the following disclaimer in the |
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14 | documentation and/or other materials provided with the distribution. |
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15 | |
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16 | 3. Neither the name of the Intel Corporation nor the names of its |
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17 | contributors may be used to endorse or promote products derived from |
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18 | this software without specific prior written permission. |
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19 | |
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20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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23 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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24 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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25 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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26 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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27 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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28 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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29 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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30 | POSSIBILITY OF SUCH DAMAGE. |
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31 | |
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32 | ***************************************************************************/ |
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33 | |
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34 | /*$FreeBSD: /repoman/r/ncvs/src/sys/dev/em/if_em.h,v 1.31 2005/05/26 23:32:02 tackerman Exp $*/ |
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35 | |
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36 | #ifndef _EM_H_DEFINED_ |
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37 | #define _EM_H_DEFINED_ |
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38 | |
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39 | |
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40 | #include <sys/param.h> |
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41 | #include <sys/systm.h> |
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42 | #include <sys/mbuf.h> |
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43 | #include <sys/protosw.h> |
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44 | #include <sys/socket.h> |
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45 | #include <sys/malloc.h> |
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46 | #include <sys/kernel.h> |
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47 | #ifndef __rtems__ |
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48 | #include <sys/module.h> |
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49 | #endif |
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50 | #include <sys/sockio.h> |
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51 | #include <sys/sysctl.h> |
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52 | |
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53 | #include <net/if.h> |
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54 | #include <net/if_arp.h> |
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55 | #include <net/ethernet.h> |
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56 | #include <net/if_dl.h> |
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57 | #include <net/if_media.h> |
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58 | #ifndef __rtems__ |
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59 | |
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60 | #include <net/bpf.h> |
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61 | #include <net/if_types.h> |
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62 | #include <net/if_vlan_var.h> |
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63 | #else |
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64 | #include <net/if_types.h> |
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65 | #endif |
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66 | |
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67 | #include <netinet/in_systm.h> |
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68 | #include <netinet/in.h> |
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69 | #include <netinet/ip.h> |
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70 | #include <netinet/tcp.h> |
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71 | #include <netinet/udp.h> |
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72 | |
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73 | #ifndef __rtems__ |
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74 | #include <sys/bus.h> |
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75 | #include <machine/bus.h> |
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76 | #include <sys/rman.h> |
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77 | #include <machine/resource.h> |
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78 | #include <vm/vm.h> |
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79 | #include <vm/pmap.h> |
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80 | #include <machine/clock.h> |
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81 | #include <dev/pci/pcivar.h> |
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82 | #include <dev/pci/pcireg.h> |
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83 | #else |
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84 | #include <netinet/if_ether.h> |
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85 | #include <bsp/pci.h> |
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86 | #endif |
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87 | |
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88 | #ifndef __rtems__ |
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89 | #include <sys/endian.h> |
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90 | #include <sys/proc.h> |
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91 | #include "opt_bdg.h" |
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92 | |
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93 | |
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94 | #include <dev/em/if_em_hw.h> |
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95 | #else |
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96 | #include "if_em_hw.h" |
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97 | #endif |
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98 | |
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99 | /* Tunables */ |
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100 | |
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101 | /* |
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102 | * EM_MAX_TXD: Maximum number of Transmit Descriptors |
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103 | * Valid Range: 80-256 for 82542 and 82543-based adapters |
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104 | * 80-4096 for others |
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105 | * Default Value: 256 |
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106 | * This value is the number of transmit descriptors allocated by the driver. |
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107 | * Increasing this value allows the driver to queue more transmits. Each |
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108 | * descriptor is 16 bytes. |
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109 | */ |
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110 | #define EM_MAX_TXD 256 |
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111 | |
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112 | /* |
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113 | * EM_MAX_RXD - Maximum number of receive Descriptors |
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114 | * Valid Range: 80-256 for 82542 and 82543-based adapters |
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115 | * 80-4096 for others |
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116 | * Default Value: 256 |
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117 | * This value is the number of receive descriptors allocated by the driver. |
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118 | * Increasing this value allows the driver to buffer more incoming packets. |
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119 | * Each descriptor is 16 bytes. A receive buffer is also allocated for each |
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120 | * descriptor. The maximum MTU size is 16110. |
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121 | * |
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122 | */ |
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123 | #define EM_MAX_RXD 80 |
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124 | |
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125 | /* |
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126 | * EM_TIDV - Transmit Interrupt Delay Value |
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127 | * Valid Range: 0-65535 (0=off) |
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128 | * Default Value: 64 |
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129 | * This value delays the generation of transmit interrupts in units of |
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130 | * 1.024 microseconds. Transmit interrupt reduction can improve CPU |
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131 | * efficiency if properly tuned for specific network traffic. If the |
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132 | * system is reporting dropped transmits, this value may be set too high |
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133 | * causing the driver to run out of available transmit descriptors. |
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134 | */ |
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135 | #define EM_TIDV 64 |
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136 | |
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137 | /* |
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138 | * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544) |
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139 | * Valid Range: 0-65535 (0=off) |
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140 | * Default Value: 64 |
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141 | * This value, in units of 1.024 microseconds, limits the delay in which a |
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142 | * transmit interrupt is generated. Useful only if EM_TIDV is non-zero, |
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143 | * this value ensures that an interrupt is generated after the initial |
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144 | * packet is sent on the wire within the set amount of time. Proper tuning, |
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145 | * along with EM_TIDV, may improve traffic throughput in specific |
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146 | * network conditions. |
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147 | */ |
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148 | #define EM_TADV 64 |
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149 | |
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150 | /* |
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151 | * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer) |
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152 | * Valid Range: 0-65535 (0=off) |
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153 | * Default Value: 0 |
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154 | * This value delays the generation of receive interrupts in units of 1.024 |
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155 | * microseconds. Receive interrupt reduction can improve CPU efficiency if |
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156 | * properly tuned for specific network traffic. Increasing this value adds |
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157 | * extra latency to frame reception and can end up decreasing the throughput |
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158 | * of TCP traffic. If the system is reporting dropped receives, this value |
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159 | * may be set too high, causing the driver to run out of available receive |
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160 | * descriptors. |
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161 | * |
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162 | * CAUTION: When setting EM_RDTR to a value other than 0, adapters |
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163 | * may hang (stop transmitting) under certain network conditions. |
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164 | * If this occurs a WATCHDOG message is logged in the system event log. |
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165 | * In addition, the controller is automatically reset, restoring the |
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166 | * network connection. To eliminate the potential for the hang |
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167 | * ensure that EM_RDTR is set to 0. |
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168 | */ |
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169 | #define EM_RDTR 0 |
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170 | |
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171 | /* |
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172 | * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) |
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173 | * Valid Range: 0-65535 (0=off) |
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174 | * Default Value: 64 |
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175 | * This value, in units of 1.024 microseconds, limits the delay in which a |
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176 | * receive interrupt is generated. Useful only if EM_RDTR is non-zero, |
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177 | * this value ensures that an interrupt is generated after the initial |
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178 | * packet is received within the set amount of time. Proper tuning, |
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179 | * along with EM_RDTR, may improve traffic throughput in specific network |
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180 | * conditions. |
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181 | */ |
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182 | #define EM_RADV 64 |
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183 | |
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184 | |
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185 | /* |
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186 | * This parameter controls the maximum no of times the driver will loop |
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187 | * in the isr. |
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188 | * Minimum Value = 1 |
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189 | */ |
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190 | #define EM_MAX_INTR 3 |
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191 | |
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192 | /* |
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193 | * Inform the stack about transmit checksum offload capabilities. |
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194 | */ |
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195 | #define EM_CHECKSUM_FEATURES (CSUM_TCP | CSUM_UDP) |
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196 | |
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197 | /* |
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198 | * This parameter controls the duration of transmit watchdog timer. |
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199 | */ |
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200 | #define EM_TX_TIMEOUT 5 /* set to 5 seconds */ |
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201 | |
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202 | /* |
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203 | * This parameter controls when the driver calls the routine to reclaim |
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204 | * transmit descriptors. |
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205 | */ |
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206 | #ifndef __rtems__ |
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207 | #define EM_TX_CLEANUP_THRESHOLD EM_MAX_TXD / 8 |
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208 | #else |
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209 | #define EM_TX_CLEANUP_THRESHOLD (adapter->tx_cleanup_threshold) |
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210 | #endif |
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211 | |
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212 | /* |
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213 | * This parameter controls whether or not autonegotation is enabled. |
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214 | * 0 - Disable autonegotiation |
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215 | * 1 - Enable autonegotiation |
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216 | */ |
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217 | #define DO_AUTO_NEG 1 |
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218 | |
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219 | /* |
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220 | * This parameter control whether or not the driver will wait for |
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221 | * autonegotiation to complete. |
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222 | * 1 - Wait for autonegotiation to complete |
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223 | * 0 - Don't wait for autonegotiation to complete |
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224 | */ |
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225 | #define WAIT_FOR_AUTO_NEG_DEFAULT 0 |
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226 | |
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227 | /* |
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228 | * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue |
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229 | * with 82541/82547 devices and some switches. See the "Known Limitations" section of |
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230 | * the README file for a complete description and a list of affected switches. |
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231 | * |
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232 | * 0 = Hardware default |
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233 | * 1 = Master mode |
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234 | * 2 = Slave mode |
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235 | * 3 = Auto master/slave |
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236 | */ |
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237 | /* #define EM_MASTER_SLAVE 2 */ |
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238 | |
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239 | /* Tunables -- End */ |
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240 | |
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241 | #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ |
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242 | ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ |
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243 | ADVERTISE_1000_FULL) |
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244 | |
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245 | #define EM_VENDOR_ID 0x8086 |
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246 | #define EM_MMBA 0x0010 /* Mem base address */ |
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247 | #define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) |
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248 | |
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249 | #define EM_JUMBO_PBA 0x00000028 |
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250 | #define EM_DEFAULT_PBA 0x00000030 |
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251 | #define EM_SMARTSPEED_DOWNSHIFT 3 |
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252 | #define EM_SMARTSPEED_MAX 15 |
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253 | |
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254 | |
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255 | #define MAX_NUM_MULTICAST_ADDRESSES 128 |
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256 | #define PCI_ANY_ID (~0U) |
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257 | #define ETHER_ALIGN 2 |
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258 | |
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259 | /* Defines for printing debug information */ |
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260 | #define DEBUG_INIT 0 |
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261 | #define DEBUG_IOCTL 0 |
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262 | #define DEBUG_HW 0 |
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263 | |
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264 | #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") |
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265 | #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) |
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266 | #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) |
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267 | #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") |
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268 | #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) |
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269 | #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) |
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270 | #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") |
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271 | #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) |
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272 | #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) |
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273 | |
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274 | |
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275 | /* Supported RX Buffer Sizes */ |
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276 | #define EM_RXBUFFER_2048 2048 |
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277 | #define EM_RXBUFFER_4096 4096 |
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278 | #define EM_RXBUFFER_8192 8192 |
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279 | #define EM_RXBUFFER_16384 16384 |
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280 | |
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281 | #define EM_MAX_SCATTER 64 |
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282 | |
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283 | /* ****************************************************************************** |
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284 | * vendor_info_array |
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285 | * |
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286 | * This array contains the list of Subvendor/Subdevice IDs on which the driver |
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287 | * should load. |
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288 | * |
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289 | * ******************************************************************************/ |
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290 | typedef struct _em_vendor_info_t { |
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291 | unsigned int vendor_id; |
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292 | unsigned int device_id; |
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293 | unsigned int subvendor_id; |
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294 | unsigned int subdevice_id; |
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295 | unsigned int index; |
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296 | } em_vendor_info_t; |
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297 | |
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298 | |
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299 | struct em_buffer { |
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300 | struct mbuf *m_head; |
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301 | #ifndef __rtems__ |
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302 | bus_dmamap_t map; /* bus_dma map for packet */ |
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303 | #endif |
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304 | }; |
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305 | |
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306 | /* |
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307 | * Bus dma allocation structure used by |
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308 | * em_dma_malloc and em_dma_free. |
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309 | */ |
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310 | struct em_dma_alloc { |
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311 | bus_addr_t dma_paddr; /* 64bit in descriptors */ |
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312 | #ifndef __rtems__ |
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313 | caddr_t dma_vaddr; |
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314 | bus_dma_tag_t dma_tag; |
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315 | bus_dmamap_t dma_map; |
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316 | bus_dma_segment_t dma_seg; |
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317 | bus_size_t dma_size; |
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318 | int dma_nseg; |
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319 | #else |
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320 | caddr_t dma_vaddr; |
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321 | caddr_t malloc_base; |
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322 | #endif |
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323 | }; |
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324 | |
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325 | typedef enum _XSUM_CONTEXT_T { |
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326 | OFFLOAD_NONE, |
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327 | OFFLOAD_TCP_IP, |
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328 | OFFLOAD_UDP_IP |
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329 | } XSUM_CONTEXT_T; |
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330 | |
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331 | struct adapter; |
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332 | struct em_int_delay_info { |
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333 | struct adapter *adapter; /* Back-pointer to the adapter struct */ |
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334 | int offset; /* Register offset to read/write */ |
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335 | int value; /* Current value in usecs */ |
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336 | }; |
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337 | |
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338 | /* For 82544 PCIX Workaround */ |
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339 | typedef struct _ADDRESS_LENGTH_PAIR |
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340 | { |
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341 | u_int64_t address; |
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342 | u_int32_t length; |
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343 | } ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR; |
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344 | |
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345 | typedef struct _DESCRIPTOR_PAIR |
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346 | { |
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347 | ADDRESS_LENGTH_PAIR descriptor[4]; |
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348 | u_int32_t elements; |
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349 | } DESC_ARRAY, *PDESC_ARRAY; |
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350 | |
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351 | /* Our adapter structure */ |
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352 | struct adapter { |
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353 | struct arpcom interface_data; |
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354 | struct adapter *next; |
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355 | struct adapter *prev; |
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356 | struct em_hw hw; |
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357 | |
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358 | /* FreeBSD operating-system-specific structures */ |
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359 | struct em_osdep osdep; |
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360 | #ifndef __rtems__ |
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361 | struct device *dev; |
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362 | struct resource *res_memory; |
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363 | struct resource *res_ioport; |
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364 | struct resource *res_interrupt; |
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365 | void *int_handler_tag; |
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366 | struct ifmedia media; |
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367 | struct callout timer; |
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368 | struct callout tx_fifo_timer; |
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369 | int io_rid; |
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370 | struct ifmedia media; |
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371 | #endif |
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372 | u_int8_t unit; |
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373 | #ifndef __rtems__ |
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374 | struct mtx mtx; |
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375 | int em_insert_vlan_header; |
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376 | #else |
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377 | device_t dev; |
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378 | unsigned char irq_no; |
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379 | unsigned char b,d,f; |
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380 | rtems_id tid; |
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381 | #endif |
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382 | |
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383 | /* Info about the board itself */ |
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384 | #ifndef __rtems__ |
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385 | u_int32_t part_num; |
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386 | #else |
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387 | uint32_t part_num; |
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388 | #endif |
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389 | u_int8_t link_active; |
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390 | u_int16_t link_speed; |
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391 | u_int16_t link_duplex; |
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392 | u_int32_t smartspeed; |
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393 | struct em_int_delay_info tx_int_delay; |
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394 | struct em_int_delay_info tx_abs_int_delay; |
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395 | struct em_int_delay_info rx_int_delay; |
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396 | struct em_int_delay_info rx_abs_int_delay; |
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397 | |
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398 | XSUM_CONTEXT_T active_checksum_context; |
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399 | |
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400 | /* |
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401 | * Transmit definitions |
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402 | * |
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403 | * We have an array of num_tx_desc descriptors (handled |
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404 | * by the controller) paired with an array of tx_buffers |
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405 | * (at tx_buffer_area). |
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406 | * The index of the next available descriptor is next_avail_tx_desc. |
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407 | * The number of remaining tx_desc is num_tx_desc_avail. |
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408 | */ |
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409 | struct em_dma_alloc txdma; /* bus_dma glue for tx desc */ |
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410 | struct em_tx_desc *tx_desc_base; |
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411 | u_int32_t next_avail_tx_desc; |
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412 | u_int32_t oldest_used_tx_desc; |
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413 | volatile u_int16_t num_tx_desc_avail; |
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414 | u_int16_t num_tx_desc; |
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415 | u_int32_t txd_cmd; |
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416 | struct em_buffer *tx_buffer_area; |
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417 | #ifndef __rtems__ |
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418 | bus_dma_tag_t txtag; /* dma tag for tx */ |
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419 | #endif |
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420 | #ifdef __rtems__ |
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421 | u_int16_t tx_cleanup_threshold; |
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422 | #endif |
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423 | |
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424 | /* |
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425 | * Receive definitions |
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426 | * |
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427 | * we have an array of num_rx_desc rx_desc (handled by the |
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428 | * controller), and paired with an array of rx_buffers |
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429 | * (at rx_buffer_area). |
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430 | * The next pair to check on receive is at offset next_rx_desc_to_check |
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431 | */ |
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432 | struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */ |
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433 | struct em_rx_desc *rx_desc_base; |
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434 | u_int32_t next_rx_desc_to_check; |
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435 | u_int16_t num_rx_desc; |
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436 | u_int32_t rx_buffer_len; |
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437 | struct em_buffer *rx_buffer_area; |
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438 | #ifndef __rtems__ |
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439 | bus_dma_tag_t rxtag; |
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440 | #endif |
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441 | |
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442 | /* Jumbo frame */ |
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443 | struct mbuf *fmp; |
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444 | struct mbuf *lmp; |
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445 | |
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446 | /* Misc stats maintained by the driver */ |
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447 | unsigned long dropped_pkts; |
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448 | unsigned long mbuf_alloc_failed; |
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449 | unsigned long mbuf_cluster_failed; |
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450 | unsigned long no_tx_desc_avail1; |
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451 | unsigned long no_tx_desc_avail2; |
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452 | unsigned long no_tx_map_avail; |
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453 | unsigned long no_tx_dma_setup; |
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454 | |
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455 | /* Used in for 82547 10Mb Half workaround */ |
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456 | #define EM_PBA_BYTES_SHIFT 0xA |
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457 | #define EM_TX_HEAD_ADDR_SHIFT 7 |
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458 | #define EM_PBA_TX_MASK 0xFFFF0000 |
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459 | #define EM_FIFO_HDR 0x10 |
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460 | |
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461 | #define EM_82547_PKT_THRESH 0x3e0 |
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462 | |
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463 | u_int32_t tx_fifo_size; |
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464 | u_int32_t tx_fifo_head; |
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465 | u_int32_t tx_fifo_head_addr; |
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466 | u_int64_t tx_fifo_reset_cnt; |
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467 | u_int64_t tx_fifo_wrk_cnt; |
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468 | u_int32_t tx_head_addr; |
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469 | |
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470 | /* For 82544 PCIX Workaround */ |
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471 | boolean_t pcix_82544; |
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472 | boolean_t in_detach; |
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473 | |
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474 | struct em_hw_stats stats; |
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475 | }; |
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476 | |
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477 | #define EM_LOCK_INIT(_sc, _name) \ |
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478 | mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF) |
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479 | #define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx) |
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480 | #define EM_LOCK(_sc) mtx_lock(&(_sc)->mtx) |
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481 | #define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) |
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482 | #define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED) |
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483 | |
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484 | #ifdef __rtems__ |
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485 | /* Initialize bare minimals so we can check the phy link status; |
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486 | * 'rtems_em_pci_setup()' must have been run on the device already! |
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487 | */ |
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488 | int |
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489 | em_hw_early_init(device_t dev); |
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490 | #endif |
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491 | |
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492 | |
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493 | #endif /* _EM_H_DEFINED_ */ |
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