source: rtems/bsps/powerpc/beatnik/include/bsp.h @ c991eeec

5
Last change on this file since c991eeec was c991eeec, checked in by Sebastian Huber <sebastian.huber@…>, on 03/04/19 at 14:32:15

bsps: Adjust bsp.h Doxygen groups

Update #3706.

  • Property mode set to 100644
File size: 8.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsPowerPCBeatnik
5 *
6 * @brief Global BSP definitions.
7 */
8
9/*
10 *  bsp.h  -- contain BSP API definition.
11 */
12
13/*
14 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  The license and distribution terms for this file may be
17 *  found in the file LICENSE in this distribution or at
18 *  http://www.rtems.org/license/LICENSE.
19 *
20 *  S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
21 *
22 *  Modified for the 'beatnik' BSP by T. Straumann, 2005-2007.
23 */
24
25#ifndef LIBBSP_BEATNIK_BSP_H
26#define LIBBSP_BEATNIK_BSP_H
27
28/**
29 * @defgroup RTEMSBSPsPowerPCBeatnik Beatnik (MVME5500 and MVME6100)
30 *
31 * @ingroup RTEMSBSPsPowerPC
32 *
33 * @brief Beatnik (MVME5500 and MVME6100) Board Support Package.
34 *
35 * @{
36 */
37
38#ifndef ASM
39
40#include <bspopts.h>
41#include <bsp/default-initial-extension.h>
42
43#include <rtems.h>
44#include <libcpu/io.h>
45#include <bsp/vectors.h>
46
47#ifdef __cplusplus
48extern "C" {
49#endif
50
51/* Board type */
52typedef enum {
53  Unknown = 0,
54  MVME5500,
55  MVME6100
56} BSP_BoardType;
57
58BSP_BoardType BSP_getBoardType(void);
59
60/* Discovery Version */
61
62typedef enum {
63  unknown    = 0,
64  GT_64260_A,      /* Revision 0x10 */
65  GT_64260_B,      /* Revision 0x20 */
66  MV_64360,
67} DiscoveryVersion;
68
69/* Determine the type of discovery chip on this board; info
70 * is cached and repeated calls just return the cached value.
71 *
72 * If a non-zero argument is passed, the routine panics
73 * (rtems_panic) if no recognized bridge is found;
74 */
75DiscoveryVersion BSP_getDiscoveryVersion(int assertion);
76
77/*
78 *  confdefs.h overrides for this BSP:
79 *   - Interrupt stack space is not minimum if defined.
80 */
81#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
82
83/*
84 *  base address definitions for several devices
85 */
86#define BSP_MV64x60_BASE        (0xf1000000)
87#define BSP_MV64x60_DEV1_BASE   (0xf1100000)
88#define BSP_UART_IOBASE_COM1    ((BSP_MV64x60_DEV1_BASE)+0x20000)
89#define BSP_UART_IOBASE_COM2    ((BSP_MV64x60_DEV1_BASE)+0x21000)
90#define BSP_UART_USE_SHARED_IRQS
91
92#define BSP_NVRAM_BASE_ADDR      (0xf1110000)
93#define BSP_NVRAM_END_ADDR       (0xf1117fff)
94#define BSP_NVRAM_RTC_START      (0xf1117ff8)
95
96#define BSP_NVRAM_BOOTPARMS_START  (0xf1111000)
97#define BSP_NVRAM_BOOTPARMS_END    (0xf1111fff)
98
99
100/* This is only active/used during early init. It defines
101 * the hose0 base for the shared/generic pci code.
102 * Our own BSP specific pci initialization will then
103 * override the PCI configuration (see gt_pci_init.c:BSP_pci_initialize)
104 */
105
106#define PCI_CONFIG_ADDR        (BSP_MV64x60_BASE + 0xcf8)
107#define PCI_CONFIG_DATA        (BSP_MV64x60_BASE + 0xcfc)
108
109/* our wonderful PCI initialization remaps everything to CPU addresses
110 * - before calling BSP_pci_initialize() this is NOT VALID, however
111 * and the deprecated inl()/outl() etc won't work!
112 */
113#define _IO_BASE          0x00000000
114/* wonderful MotLoad has the base address as seen from the
115 * CPU programmed into config space :-)
116 */
117#define PCI_MEM_BASE               0
118#define PCI_MEM_BASE_ADJUSTMENT    0
119#define PCI_DRAM_OFFSET            0
120
121extern void BSP_motload_pci_fixup(void);
122
123/* PCI <-> local address mapping - no sophisticated windows
124 * (i.e., no support for cached regions etc. you read a BAR
125 * from config space and that's 1:1 where the CPU sees it).
126 * Our memory is mapped 1:1 to PCI also.
127 */
128#define BSP_PCI2LOCAL_ADDR(a) ((uint32_t)(a))
129#define BSP_LOCAL2PCI_ADDR(a) ((uint32_t)(a))
130
131#define BSP_CONFIG_NUM_PCI_CACHE_SLOTS  32
132
133#define BSP_CONSOLE_PORT      BSP_UART_COM1
134#define BSP_UART_BAUD_BASE    115200
135
136/* I2C Devices */
137/* Note that the i2c addresses stated in the manual are
138 * left-shifted by one bit.
139 */
140#define BSP_VPD_I2C_ADDR      (0xA8>>1)    /* the VPD EEPROM  */
141#define BSP_USR_I2C_ADDR      (0xAA>>1)    /* the user EEPROM */
142#define BSP_THM_I2C_ADDR      (0x90>>1)    /* the DS1621 temperature sensor & thermostat */
143
144#define BSP_I2C_BUS_DESCRIPTOR    gt64260_i2c_bus_descriptor
145
146#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
147
148#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
149#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
150#define BSP_I2C_DS1621_NAME           "ds1621"
151#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
152#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
153
154#define  BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME ", " BSP_I2C_VPD_EEPROM_NAME)
155#define  BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME ", " BSP_I2C_USR_EEPROM_NAME)
156#define  BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME ", " BSP_I2C_DS1621_NAME)
157#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
158#define  BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME ", " BSP_I2C_DS1621_RAW_NAME)
159
160
161/* Initialize the I2C driver and register all devices
162 * RETURNS 0 on success, -1 on error.
163 *
164 * Access to the VPD and user EEPROMS as well
165 * as the ds1621 temperature sensor is possible
166 * by means of file nodes
167 *
168 *   /dev/i2c0.vpd-eeprom   (read-only)
169 *   /dev/i2c0.usr-eeprom   (read-write)
170 *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
171 *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
172 */
173int BSP_i2c_initialize(void);
174
175/* Networking; */
176#if defined(RTEMS_NETWORKING)
177#include <bsp/bsp_bsdnet_attach.h>
178int rtems_em_attach(struct rtems_bsdnet_ifconfig *, int);
179int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int);
180int rtems_dc_driver_attach(struct rtems_bsdnet_ifconfig *, int);
181#endif
182
183/* NOT FOR PUBLIC USE BELOW HERE */
184#define BSP_PCI_HOSE0_MEM_BASE    0x80000000  /* must be aligned to size */
185#define BSP_PCI_HOSE0_MEM_SIZE    0x20000000
186
187#define BSP_PCI_HOSE1_MEM_BASE    0xe0000000
188
189#define BSP_DEV_AND_PCI_IO_BASE   0xf0000000
190#define BSP_DEV_AND_PCI_IO_SIZE   0x10000000
191
192/* maintain coherency between CPU and GT64340 Ethernet
193 * (andpossibly other Discovery components).
194 */
195#define BSP_RW_PAGE_ATTRIBUTES  TRIV121_ATTR_M
196
197extern unsigned BSP_pci_hose1_bus_base;
198
199void BSP_pci_initialize(void);
200
201/* Exception Handling */
202
203/* Use a task notepad to attach user exception handler info;
204 * may be changed by application startup code (EPICS uses 11)
205 */
206#define BSP_EXCEPTION_NOTEPAD    14
207 
208#ifndef ASM
209
210#define outport_byte(port,value) outb(value,port)
211#define outport_word(port,value) outw(value,port)
212#define outport_long(port,value) outl(value,port)
213
214#define inport_byte(port,value) (value = inb(port))
215#define inport_word(port,value) (value = inw(port))
216#define inport_long(port,value) (value = inl(port))
217/*
218 * Vital Board data Start using DATA RESIDUAL
219 */
220/*
221 * Total memory using RESIDUAL DATA
222 */
223extern unsigned int BSP_mem_size;
224/*
225 * Start of the heap
226 */
227extern unsigned int BSP_heap_start;
228/*
229 * PCI Bus Frequency
230 */
231extern unsigned int BSP_bus_frequency;
232/*
233 * processor clock frequency
234 */
235extern unsigned int BSP_processor_frequency;
236/*
237 * Time base divisior (how many tick for 1 second).
238 */
239extern unsigned int BSP_time_base_divisor;
240
241extern char BSP_productIdent[20];
242extern char BSP_serialNumber[20];
243
244extern char BSP_enetAddr0[7];
245extern char BSP_enetAddr1[7];
246
247/*
248 * The commandline as passed from the bootloader.
249 */
250extern char *BSP_commandline_string;
251
252
253#define BSP_Convert_decrementer( _value ) \
254  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
255
256extern void bsp_reset(void);
257extern int BSP_disconnect_clock_handler (void);
258extern int BSP_connect_clock_handler (void);
259
260/* clear hostbridge errors
261 *
262 * enableMCP: whether to enable MCP checkstop / machine check interrupts
263 *            on the hostbridge and in HID0.
264 *
265 *            NOTE: The 5500 and 6100 boards have NO PHYSICAL CONNECTION
266 *                  to MCP so 'enableMCP' will always fail!
267 *
268 * quiet    : be silent
269 *
270 * RETURNS  : PCI status (hose 0 in byte 0, host 1 in byte 1) and
271 *            VME bridge status (upper 16 bits).
272 *            Zero if no errors were found.
273 */
274extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
275
276/* clear vme bridge errors and return (bridge-dependent) 16-bit status
277 *
278 * quiet    : be silent
279 *
280 * RETURNS  : 0 if there were no errors, non-zero, bridge-dependent
281 *            16-bit error status on error.
282 *
283 */
284extern unsigned short (*_BSP_clear_vmebridge_errors)(int);
285
286/*
287 * Prototypes for debug helpers
288 */
289void discovery_pic_set_debug_irq(int on);
290void discovery_pic_install_debug_irq(void);
291
292/*
293 * Prototypes for methods called only from .S for dependency tracking
294 */
295char *save_boot_params(
296  void *r3,
297  void *r4,
298  void *r5,
299  char *cmdline_start,
300  char *cmdline_end
301);
302void zero_bss(void);
303
304/*
305 * Prototypes for methods in the BSP that cross file boundaries
306 */
307uint32_t probeMemoryEnd(void);
308
309#endif
310
311#ifdef __cplusplus
312}
313#endif
314
315#endif /* !ASM */
316
317/** @} */
318
319#endif
Note: See TracBrowser for help on using the repository browser.