1 | /* NIOS2 startup code |
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2 | * |
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3 | * This is the entry point on reset and when loading the |
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4 | * executive from a bootloader. |
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5 | * |
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6 | * COPYRIGHT (c) 2005-2006 Kolja Waschk rtemsdev/ixo.de |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.rtems.org/license/LICENSE. |
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11 | */ |
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12 | |
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13 | .section .entry |
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14 | .align 3 |
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15 | movhi et, %hiadj(start) |
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16 | addi et, et, %lo(start) |
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17 | jmp et |
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18 | |
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19 | .section .irq |
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20 | .align 3 |
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21 | movhi et, %hiadj(_exception_vector) |
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22 | addi et, et, %lo(_exception_vector) |
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23 | jmp et |
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24 | |
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25 | .section .text |
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26 | .align 3 |
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27 | .globl start |
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28 | .type start,@function |
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29 | |
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30 | .extern _exception_vector |
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31 | |
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32 | start: |
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33 | #------------------------------------------------------ |
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34 | # disable interrupts |
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35 | wrctl status, zero |
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36 | wrctl ienable, zero |
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37 | |
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38 | #------------------------------------------------------ |
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39 | # invalidate instruction cache |
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40 | mov r2, r0 |
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41 | movhi r3, %hi(__nios2_icache_size) |
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42 | ori r3, r3, %lo(__nios2_icache_size) |
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43 | icache_init_loop: |
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44 | initi r2 |
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45 | addi r2, r2, __nios2_icache_line_size |
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46 | bltu r2, r3, icache_init_loop |
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47 | |
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48 | #------------------------------------------------------ |
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49 | # invalidate data cache |
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50 | mov r2, r0 |
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51 | movhi r3, %hi(__nios2_dcache_size) |
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52 | ori r3, r3, %lo(__nios2_dcache_size) |
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53 | dcache_init_loop: |
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54 | initd 0(r2) |
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55 | addi r2, r2, __nios2_dcache_line_size |
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56 | bltu r2, r3, dcache_init_loop |
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57 | |
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58 | #------------------------------------------------------ |
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59 | # initialize stack pointer |
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60 | movhi sp, %hiadj(__alt_stack_pointer - 4) |
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61 | addi sp, sp, %lo(__alt_stack_pointer - 4) |
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62 | |
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63 | # initialize global pointer |
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64 | movhi gp, %hiadj(_gp) |
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65 | addi gp, gp, %lo(_gp) |
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66 | |
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67 | # initialize exception tmp register |
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68 | movhi et, %hiadj(_end) |
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69 | addi et, et, %lo(_end) |
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70 | |
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71 | #------------------------------------------------------ |
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72 | # TODO: copy data from flash to RAM, if not there already |
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73 | # For now its save to assume it is there already when we're |
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74 | # loading code though JTAG into RAM-only system |
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75 | |
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76 | # at least copy exception code to right place |
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77 | movhi r2, %hiadj(__ram_exceptions_start) |
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78 | addi r2, r2, %lo(__ram_exceptions_start) |
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79 | |
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80 | movhi r3, %hiadj(brto_ev) |
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81 | addi r3, r3, %lo(brto_ev) |
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82 | ldw r4, 0(r3) |
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83 | stw r4, 0(r2) |
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84 | ldw r4, 4(r3) |
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85 | stw r4, 4(r2) |
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86 | ldw r4, 8(r3) |
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87 | stw r4, 8(r2) |
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88 | ldw r4, 12(r3) |
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89 | stw r4, 12(r2) |
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90 | |
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91 | #------------------------------------------------------ |
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92 | # clear bss |
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93 | movhi r2, %hiadj(__bss_start) |
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94 | addi r2, r2, %lo(__bss_start) |
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95 | |
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96 | movhi r3, %hiadj(__bss_end) |
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97 | addi r3, r3, %lo(__bss_end) |
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98 | |
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99 | beq r2, r3, 1f |
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100 | 0: |
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101 | stw zero, (r2) |
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102 | addi r2, r2, 4 |
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103 | bltu r2, r3, 0b |
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104 | 1: |
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105 | #------------------------------------------------------ |
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106 | # jump to (shared) boot_card (never comes back) |
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107 | mov r4, zero |
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108 | mov r5, zero |
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109 | mov r6, zero |
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110 | call boot_card |
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111 | # but just in case it does come back, stick here. |
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112 | _stuck_in_start: |
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113 | br _stuck_in_start |
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114 | |
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115 | #------------------------------------------------------ |
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116 | # code to be placed at exception address |
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117 | brto_ev: |
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118 | movhi et, %hiadj(_exception_vector) |
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119 | addi et, et, %lo(_exception_vector) |
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120 | jmp et |
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121 | |
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122 | |
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