source: rtems/bsps/mips/rbtx4938/include/bsp/irq.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.
  • Property mode set to 100644
File size: 2.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup bsp_interrupt
5 *
6 * @brief interrupt definitions.
7 */
8
9/*
10 *  COPYRIGHT (c) 1989-2012.
11 *  On-Line Applications Research Corporation (OAR).
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.org/license/LICENSE.
16 */
17
18#ifndef LIBBSP_MIPS_TX4938_IRQ_H
19#define LIBBSP_MIPS_TX4938_IRQ_H
20
21#ifndef ASM
22  #include <rtems.h>
23  #include <rtems/irq.h>
24  #include <rtems/irq-extension.h>
25  #include <rtems/score/mips.h>
26#endif
27
28/**
29 * @addtogroup bsp_interrupt
30 *
31 * @{
32 */
33
34/*
35 *  Interrupt Vector Numbers
36 *
37 */
38#define BSP_INTERRUPT_VECTOR_MIN   0
39#define TX4938_IRQ_ECC         MIPS_INTERRUPT_BASE+0
40#define TX4938_IRQ_WTE         MIPS_INTERRUPT_BASE+1
41#define TX4938_IRQ_INT0        MIPS_INTERRUPT_BASE+2
42#define TX4938_IRQ_INT1        MIPS_INTERRUPT_BASE+3
43#define TX4938_IRQ_INT2        MIPS_INTERRUPT_BASE+4
44#define TX4938_IRQ_INT3        MIPS_INTERRUPT_BASE+5
45#define TX4938_IRQ_INT4        MIPS_INTERRUPT_BASE+6
46#define TX4938_IRQ_INT5        MIPS_INTERRUPT_BASE+7
47#define TX4938_IRQ_SIO0        MIPS_INTERRUPT_BASE+8
48#define TX4938_IRQ_SIO1        MIPS_INTERRUPT_BASE+9
49#define TX4938_IRQ_DMAC00      MIPS_INTERRUPT_BASE+10
50#define TX4938_IRQ_DMAC01      MIPS_INTERRUPT_BASE+11
51#define TX4938_IRQ_DMAC02      MIPS_INTERRUPT_BASE+12
52#define TX4938_IRQ_DMAC03      MIPS_INTERRUPT_BASE+13
53#define TX4938_IRQ_IRC         MIPS_INTERRUPT_BASE+14
54#define TX4938_IRQ_PDMAC       MIPS_INTERRUPT_BASE+15
55#define TX4938_IRQ_PCIC        MIPS_INTERRUPT_BASE+16
56#define TX4938_IRQ_TMR0        MIPS_INTERRUPT_BASE+17
57#define TX4938_IRQ_TMR1        MIPS_INTERRUPT_BASE+18
58#define TX4938_IRQ_TMR2        MIPS_INTERRUPT_BASE+19
59#define TX4938_IRQ_RSV1        MIPS_INTERRUPT_BASE+20
60#define TX4938_IRQ_NDFMC       MIPS_INTERRUPT_BASE+21
61#define TX4938_IRQ_PCIERR      MIPS_INTERRUPT_BASE+22
62#define TX4938_IRQ_PCIPMC      MIPS_INTERRUPT_BASE+23
63#define TX4938_IRQ_ACLC        MIPS_INTERRUPT_BASE+24
64#define TX4938_IRQ_ACLCPME     MIPS_INTERRUPT_BASE+25
65#define TX4938_IRQ_PCIC1NT     MIPS_INTERRUPT_BASE+26
66#define TX4938_IRQ_ACLCPME     MIPS_INTERRUPT_BASE+27
67#define TX4938_IRQ_DMAC10      MIPS_INTERRUPT_BASE+28
68#define TX4938_IRQ_DMAC11      MIPS_INTERRUPT_BASE+29
69#define TX4938_IRQ_DMAC12      MIPS_INTERRUPT_BASE+30
70#define TX4938_IRQ_DMAC13      MIPS_INTERRUPT_BASE+31
71
72#define TX4938_IRQ_SOFTWARE_1  MIPS_INTERRUPT_BASE+32
73#define TX4938_IRQ_SOFTWARE_2  MIPS_INTERRUPT_BASE+33
74#define TX4938_MAXIMUM_VECTORS MIPS_INTERRUPT_BASE+34
75
76#define BSP_INTERRUPT_VECTOR_MAX TX4938_MAXIMUM_VECTORS
77
78/** @} */
79
80#endif /* LIBBSP_MIPS_JMR3904_IRQ_H */
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