source: rtems/bsps/mips/malta/start/start.S @ ff081aee

5
Last change on this file since ff081aee was ff081aee, checked in by Sebastian Huber <sebastian.huber@…>, on 11/06/18 at 15:58:02

score: Rename interrupt stack symbols

Rename

  • _Configuration_Interrupt_stack_area_begin in _ISR_Stack_area_begin,
  • _Configuration_Interrupt_stack_area_end in _ISR_Stack_area_end, and
  • _Configuration_Interrupt_stack_size in _ISR_Stack_size.

Move definitions to <rtems/score/isr.h>. The new names are considerable
shorter and in the right namespace.

Update #3459.

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 * start.S -- startup file for JMR3904 BSP based upon crt0.S from
3 * newlib-1.8.2/libgloss/mips and adapted for RTEMS.
4 *
5 * crt0.S -- startup file for MIPS.
6 *
7 * Copyright (c) 1995, 1996, 1997 Cygnus Support
8 *
9 * The authors hereby grant permission to use, copy, modify, distribute,
10 * and license this software and its documentation for any purpose, provided
11 * that existing copyright notices are retained in all copies and that this
12 * notice is included verbatim in any distributions. No written agreement,
13 * license, or royalty fee is required for any of the authorized uses.
14 * Modifications to this software may be copyrighted by their authors
15 * and need not follow the licensing terms described here, provided that
16 * the new terms are clearly indicated on the first page of each file where
17 * they apply.
18 */
19
20#include <rtems/asm.h>
21#include <bsp/regs.h>
22
23#include <bsp.h>
24
25#ifdef __mips16
26/* This file contains 32 bit assembly code.  */
27        .set nomips16
28#endif
29
30/* This is for referencing addresses that are not in the .sdata or
31   .sbss section under embedded-pic, or before we've set up gp.  */
32#ifdef __mips_embedded_pic
33# ifdef __mips64
34#  define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
35# else
36#  define LA(t,x) la t,x-PICBASE ; addu t,s0,t
37# endif
38#else /* __mips_embedded_pic */
39# define LA(t,x) la t,x
40#endif /* __mips_embedded_pic */
41
42        .text
43        .align  2
44
45/* Without the following nop, GDB thinks _start is a data variable.
46 * This is probably a bug in GDB in handling a symbol that is at the
47 * start of the .text section.
48 */
49        nop
50        nop
51        nop
52        nop
53        nop
54        nop
55        nop
56        nop
57        nop
58        .globl  _start
59        .ent    _start
60_start:
61        nop
62        nop
63        nop
64        nop
65        nop
66        nop
67        nop
68        nop
69        .set    noreorder
70        /* Get the address of start into $5 in a position independent fashion.
71        ** This lets us know whether we have been relocated or not.
72        */
73        $LF1 = . + 8
74        bal     $LF1
75        nop
76_branch:
77#if 0
78        move    $5, $31                         # $5 == where are we
79        li      $6, 0x8800000c                  # $6 == where we want to be
80/*      #la      $6,_branch */
81        beq     $5, $6, _start_in_ram
82        nop
83        /* relocate the code from EEPROM to RAM */
84        la      $7, _edata
85relocate:
86        nop
87        lw      $8, ($5)                        # $8 = *EEPROM
88        addu    $5, $5, 4                       # EEPROM++
89        sw      $8, ($6)                        # *RAM = $8
90        addu    $6, $6, 4                       # RAM++
91        bne     $6, $7, relocate                # copied all the way to edata?
92        nop
93        la      $6, _start_in_ram
94        jr      $6
95        nop
96        .end _start
97
98        .globl  _start_in_ram
99        .ent _start_in_ram
100#endif
101_start_in_ram:
102        nop
103#if 0
104#ifdef __mips_embedded_pic
105        PICBASE = .+8
106        bal     PICBASE
107        nop
108        move    s0,$31
109#endif
110#endif
111        li      v0, SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
112        mtc0    v0, C0_SR
113        mtc0    zero, C0_CAUSE
114
115#if 0
116/* Check for FPU presence */
117#ifndef __mips_soft_float
118/* This doesn't work if there is no FPU.  We get illegal instruction
119   exceptions.  */
120        li      t2,0xAAAA5555
121        mtc1    t2,fp0          /* write to FPR 0 */
122        mtc1    zero,fp1        /* write to FPR 1 */
123        mfc1    t0,fp0
124        mfc1    t1,fp1
125        nop
126        bne     t0,t2,1f        /* check for match */
127        nop
128        bne     t1,zero,1f      /* double check */
129        nop
130#ifndef __mips64  /* Clear the FR bit */
131        li      v0, SR_CU1|SR_PE|SR_KX|SR_SX|SR_UX
132        mtc0    v0, C0_SR
133#endif
134        j       2f
135        nop
136#endif
137#endif
138
1391:
140        li      v0, SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
141        mtc0    v0, C0_SR
1422:
143/* Fix high bits, if any, of the PC so that exception handling
144   doesn't get confused.  */
145        LA (v0, 3f)
146        jr      v0
147        nop
1483:
149        LA (gp, _gp)                            # set the global data pointer
150#if 0
151        .end _start_in_ram
152#else
153        .end _start
154#endif
155
156/*
157 * zero out the bss section.
158 */
159        .globl  zerobss
160        .ent    zerobss
161zerobss:
162        LA (v0, _fbss)
163        LA (v1, _end)
1643:
165        sw      zero,0(v0)
166        bltu    v0,v1,3b
167        addiu   v0,v0,4                         # executed in delay slot
168
169        la      t0, _ISR_Stack_area_end # initialize stack so we
170        /* We must subtract 24 bytes for the 3 8 byte arguments to main, in
171           case main wants to write them back to the stack.  The caller is
172           supposed to allocate stack space for parameters in registers in
173           the old MIPS ABIs.  We must do this even though we aren't passing
174           arguments, because main might be declared to have them.
175
176           Some ports need a larger alignment for the stack, so we subtract
177           32, which satisifes the stack for the arguments and keeps the
178           stack pointer better aligned.  */
179        subu    t0,t0,32
180        move    sp,t0                           # set stack pointer
181        .end    zerobss
182
183        .globl  exit .text
184        .globl  init
185        .ent    init
186init:
187        nop
188        jal     init_tlb                /* clear the tlb */
189        move    a0,zero                         # set command line to 0
190        jal     boot_card                       # call the program start function
191        nop
192
193dead:
194        b       dead
195        nop
196        .end    init
197
198/*
199 * _sys_exit -- Exit from the application. Normally we cause a user trap
200 *          to return to the ROM monitor for another run. NOTE: This is
201 *          the only other routine we provide in the crt0.o object, since
202 *          it may be tied to the "_start" routine. It also allows
203 *          executables that contain a complete world to be linked with
204 *          just the crt0.o object.
205 */
206        .globl  _sys_exit
207        .ent _sys_exit
208_sys_exit:
2097:
210#ifdef GCRT0
211        jal     _mcleanup
212        nop
213#endif
214        /* break instruction can cope with 0xfffff, but GAS limits the range: */
215        break   1023
216        nop
217        b       7b                              # but loop back just in-case
218        nop
219        .end _sys_exit
220
221/* EOF crt0.S */
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