source: rtems/bsps/mips/jmr3904/start/start.S @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 * start.S -- startup file for JMR3904 BSP based upon crt0.S from
3 * newlib-1.8.2/libgloss/mips and adapted for RTEMS.
4 *
5 * crt0.S -- startup file for MIPS.
6 *
7 * Copyright (c) 1995, 1996, 1997 Cygnus Support
8 *
9 * The authors hereby grant permission to use, copy, modify, distribute,
10 * and license this software and its documentation for any purpose, provided
11 * that existing copyright notices are retained in all copies and that this
12 * notice is included verbatim in any distributions. No written agreement,
13 * license, or royalty fee is required for any of the authorized uses.
14 * Modifications to this software may be copyrighted by their authors
15 * and need not follow the licensing terms described here, provided that
16 * the new terms are clearly indicated on the first page of each file where
17 * they apply.
18 */
19
20#include <rtems/asm.h>
21#include <bsp/regs.h>
22
23#ifdef __mips16
24/* This file contains 32 bit assembly code.  */
25        .set nomips16
26#endif
27
28/* This is for referencing addresses that are not in the .sdata or
29   .sbss section under embedded-pic, or before we've set up gp.  */
30#ifdef __mips_embedded_pic
31# ifdef __mips64
32#  define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
33# else
34#  define LA(t,x) la t,x-PICBASE ; addu t,s0,t
35# endif
36#else /* __mips_embedded_pic */
37# define LA(t,x) la t,x
38#endif /* __mips_embedded_pic */
39
40        .text
41        .align  2
42
43/* Without the following nop, GDB thinks _start is a data variable.
44 * This is probably a bug in GDB in handling a symbol that is at the
45 * start of the .text section.
46 */
47        nop
48
49        .globl  _start
50        .ent    _start
51_start:
52        .set    noreorder
53        /* Get the address of start into $5 in a position independent fashion.
54        ** This lets us know whether we have been relocated or not.
55        */
56        $LF1 = . + 8
57        bal     $LF1
58        nop
59_branch:
60        move    $5, $31                         # $5 == where are we
61        li      $6, 0x8800000c                  # $6 == where we want to be
62/*      #la      $6,_branch */
63        beq     $5, $6, _start_in_ram
64        nop
65        /* relocate the code from EEPROM to RAM */
66        la      $7, _edata
67relocate:
68        lw      $8, ($5)                        # $8 = *EEPROM
69        addu    $5, $5, 4                       # EEPROM++
70        sw      $8, ($6)                        # *RAM = $8
71        addu    $6, $6, 4                       # RAM++
72        bne     $6, $7, relocate                # copied all the way to edata?
73        nop
74        la      $6, _start_in_ram
75        jr      $6
76        nop
77        .end _start
78
79        .globl  _start_in_ram
80        .ent _start_in_ram
81_start_in_ram:
82        nop
83
84#ifdef __mips_embedded_pic
85        PICBASE = .+8
86        bal     PICBASE
87        nop
88        move    s0,$31
89#endif
90
91        li      v0, SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
92        mtc0    v0, C0_SR
93        mtc0    zero, C0_CAUSE
94
95/* Check for FPU presence */
96#ifndef __mips_soft_float
97/* This doesn't work if there is no FPU.  We get illegal instruction
98   exceptions.  */
99        li      t2,0xAAAA5555
100        mtc1    t2,fp0          /* write to FPR 0 */
101        mtc1    zero,fp1        /* write to FPR 1 */
102        mfc1    t0,fp0
103        mfc1    t1,fp1
104        nop
105        bne     t0,t2,1f        /* check for match */
106        nop
107        bne     t1,zero,1f      /* double check */
108        nop
109#ifndef __mips64  /* Clear the FR bit */
110        li      v0, SR_CU1|SR_PE|SR_KX|SR_SX|SR_UX
111        mtc0    v0, C0_SR
112#endif
113        j       2f
114        nop
115#endif
1161:
117        li      v0, SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
118        mtc0    v0, C0_SR
1192:
120/* Fix high bits, if any, of the PC so that exception handling
121   doesn't get confused.  */
122        LA (v0, 3f)
123        jr      v0
124        nop
1253:
126        LA (gp, _gp)                            # set the global data pointer
127        .end _start_in_ram
128
129/*
130 * zero out the bss section.
131 */
132        .globl  zerobss
133        .ent    zerobss
134zerobss:
135        LA (v0, _fbss)
136        LA (v1, _end)
1373:
138        sw      zero,0(v0)
139        bltu    v0,v1,3b
140        addiu   v0,v0,4                         # executed in delay slot
141
142        la      t0, _Configuration_Interrupt_stack_area_end # initialize stack so we
143        /* We must subtract 24 bytes for the 3 8 byte arguments to main, in
144           case main wants to write them back to the stack.  The caller is
145           supposed to allocate stack space for parameters in registers in
146           the old MIPS ABIs.  We must do this even though we aren't passing
147           arguments, because main might be declared to have them.
148
149           Some ports need a larger alignment for the stack, so we subtract
150           32, which satisifes the stack for the arguments and keeps the
151           stack pointer better aligned.  */
152        subu    t0,t0,32
153        move    sp,t0                           # set stack pointer
154        .end    zerobss
155
156        .globl  exit .text
157        .globl  init
158        .ent    init
159init:
160
161        move    a0,zero                         # set command line to 0
162        jal     boot_card                       # call the program start function
163        nop
164
165        /* fall through to the "exit" routine */
166        jal     _sys_exit                       /* call libc exit to run the G++ */
167                                                /* destructors */
168        move    a0,v0                           /* pass through the exit code */
169        .end    init
170
171/*
172 * _sys_exit -- Exit from the application. Normally we cause a user trap
173 *          to return to the ROM monitor for another run. NOTE: This is
174 *          the only other routine we provide in the crt0.o object, since
175 *          it may be tied to the "_start" routine. It also allows
176 *          executables that contain a complete world to be linked with
177 *          just the crt0.o object.
178 */
179        .globl  bsp_reset
180bsp_reset:
181        .globl  _sys_exit
182        .ent _sys_exit
183_sys_exit:
1847:
185#ifdef GCRT0
186        jal     _mcleanup
187        nop
188#endif
189        /* break instruction can cope with 0xfffff, but GAS limits the range: */
190        break   1023
191        nop
192        b       7b                              # but loop back just in-case
193        nop
194        .end _sys_exit
195
196/* EOF crt0.S */
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