1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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2 | |
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3 | /** |
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4 | * @file |
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5 | * |
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6 | * MIPS Tx3904 specific information |
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7 | * |
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8 | * NOTE: This is far from complete. --joel (13 Dec 2000) |
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9 | */ |
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10 | |
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11 | /* |
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12 | * COPYRIGHT (c) 1989-2012. |
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13 | * On-Line Applications Research Corporation (OAR). |
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14 | * |
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15 | * Redistribution and use in source and binary forms, with or without |
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16 | * modification, are permitted provided that the following conditions |
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17 | * are met: |
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18 | * 1. Redistributions of source code must retain the above copyright |
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19 | * notice, this list of conditions and the following disclaimer. |
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20 | * 2. Redistributions in binary form must reproduce the above copyright |
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21 | * notice, this list of conditions and the following disclaimer in the |
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22 | * documentation and/or other materials provided with the distribution. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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34 | * POSSIBILITY OF SUCH DAMAGE. |
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35 | */ |
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36 | |
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37 | #ifndef __TX3904_h |
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38 | #define __TX3904_h |
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39 | |
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40 | /* |
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41 | * Timer Base Addresses and Offsets |
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42 | */ |
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43 | |
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44 | #define TX3904_TIMER0_BASE 0xFFFFF000 |
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45 | #define TX3904_TIMER1_BASE 0xFFFFF100 |
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46 | #define TX3904_TIMER2_BASE 0xFFFFF200 |
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47 | |
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48 | #define TX3904_TIMER_TCR 0x00 |
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49 | #define TX3904_TIMER_TISR 0x04 |
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50 | #define TX3904_TIMER_CPRA 0x08 |
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51 | #define TX3904_TIMER_CPRB 0x0C |
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52 | #define TX3904_TIMER_ITMR 0x10 |
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53 | #define TX3904_TIMER_CCDR 0x20 |
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54 | #define TX3904_TIMER_PGMR 0x30 |
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55 | #define TX3904_TIMER_WTMR 0x40 |
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56 | #define TX3904_TIMER_TRR 0xF0 |
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57 | |
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58 | #define TX3904_TIMER_READ( _base, _register ) \ |
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59 | *((volatile uint32_t*)((_base) + (_register))) |
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60 | |
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61 | #define TX3904_TIMER_WRITE( _base, _register, _value ) \ |
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62 | *((volatile uint32_t*)((_base) + (_register))) = (_value) |
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63 | |
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64 | #endif |
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