[0c0181d] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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[7283768] | 4 | * This file contains the clock driver initialization for the Hurricane BSP. |
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[0c0181d] | 5 | */ |
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| 6 | |
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| 7 | /* |
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[7283768] | 8 | * Author: Craig Lebakken <craigl@transition.com> |
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| 9 | * |
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| 10 | * COPYRIGHT (c) 1996 by Transition Networks Inc. |
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| 11 | * |
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| 12 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 13 | * without any express or implied warranty: |
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| 14 | * permission to use, copy, modify, and distribute this file |
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| 15 | * for any purpose is hereby granted without fee, provided that |
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| 16 | * the above copyright notice and this notice appears in all |
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| 17 | * copies, and that the name of Transition Networks not be used in |
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| 18 | * advertising or publicity pertaining to distribution of the |
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| 19 | * software without specific, written prior permission. |
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| 20 | * Transition Networks makes no representations about the suitability |
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| 21 | * of this software for any purpose. |
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| 22 | * |
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[0c0181d] | 23 | * Derived from c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c |
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[7283768] | 24 | * |
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[0c0181d] | 25 | * COPYRIGHT (c) 1989-2012. |
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[7283768] | 26 | * On-Line Applications Research Corporation (OAR). |
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| 27 | * |
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| 28 | * The license and distribution terms for this file may be |
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| 29 | * found in the file LICENSE in this distribution or at |
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[c499856] | 30 | * http://www.rtems.org/license/LICENSE. |
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[7283768] | 31 | */ |
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| 32 | |
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| 33 | /* |
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| 34 | * Rather than deleting this, it is commented out to (hopefully) help |
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| 35 | * the submitter send updates. |
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| 36 | * |
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| 37 | * static char _sccsid[] = "@(#)ckinit.c 08/20/96 1.3\n"; |
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| 38 | */ |
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| 39 | |
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| 40 | |
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| 41 | #include <stdlib.h> |
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| 42 | |
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| 43 | #include <rtems.h> |
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[0c0181d] | 44 | #include <bsp.h> |
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| 45 | #include <bsp/irq.h> |
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[52366987] | 46 | #include <rtems/clockdrv.h> |
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[7283768] | 47 | |
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[c63f6e2e] | 48 | extern uint32_t bsp_clicks_per_microsecond; |
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| 49 | |
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[7283768] | 50 | #define EXT_INT1 0x800 /* external interrupt 5 */ |
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| 51 | |
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| 52 | #include "clock.h" |
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| 53 | |
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[0c0181d] | 54 | rtems_isr USC_isr(void *unused); |
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[7283768] | 55 | |
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| 56 | void reset_wdt(void); |
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| 57 | void enable_wdi(void); |
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| 58 | void init_hbt(void); |
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| 59 | void enable_hbi(void); |
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| 60 | void disable_hbi(void); |
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| 61 | |
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[a6b2080] | 62 | static void Clock_exit(void); |
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[0c0181d] | 63 | rtems_isr Clock_isr(rtems_vector_number vector); |
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| 64 | rtems_isr User_Clock_isr(rtems_vector_number vector); |
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| 65 | void Install_clock(rtems_isr_entry clock_isr); |
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[7283768] | 66 | |
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| 67 | |
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| 68 | /* |
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| 69 | * The interrupt vector number associated with the clock tick device |
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| 70 | * driver. |
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| 71 | */ |
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| 72 | |
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| 73 | #define CLOCK_VECTOR_MASK EXT_INT1 |
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| 74 | #define CLOCK_VECTOR MIPS_INTERRUPT_BASE + 0x3 |
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| 75 | |
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| 76 | /* |
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| 77 | * Clock_driver_ticks is a monotonically increasing counter of the |
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| 78 | * number of clock ticks since the driver was initialized. |
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| 79 | */ |
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| 80 | |
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| 81 | volatile uint32_t Clock_driver_ticks; |
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| 82 | |
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| 83 | /* |
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| 84 | * Clock_isrs is the number of clock ISRs until the next invocation of |
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| 85 | * the RTEMS clock tick routine. The clock tick device driver |
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| 86 | * gets an interrupt once a millisecond and counts down until the |
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| 87 | * length of time between the user configured microseconds per tick |
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| 88 | * has passed. |
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| 89 | */ |
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| 90 | |
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| 91 | uint32_t Clock_isrs; /* ISRs until next tick */ |
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| 92 | |
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| 93 | /* |
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| 94 | * The previous ISR on this clock tick interrupt vector. |
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| 95 | */ |
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| 96 | |
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| 97 | rtems_isr_entry Old_ticker; |
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| 98 | |
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| 99 | static uint32_t mips_timer_rate = 0; |
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| 100 | |
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| 101 | /* |
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| 102 | * Isr Handler |
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| 103 | */ |
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| 104 | |
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| 105 | rtems_isr Clock_isr( |
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| 106 | rtems_vector_number vector |
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| 107 | ) |
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| 108 | { |
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| 109 | /* |
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| 110 | * bump the number of clock driver ticks since initialization |
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| 111 | * |
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| 112 | * determine if it is time to announce the passing of tick as configured |
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| 113 | * to RTEMS through the rtems_clock_tick directive |
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| 114 | * |
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| 115 | * perform any timer dependent tasks |
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| 116 | */ |
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| 117 | |
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[c63f6e2e] | 118 | reset_wdt(); /* Reset hardware watchdog timer */ |
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[7283768] | 119 | |
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| 120 | Clock_driver_ticks += 1; |
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| 121 | |
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| 122 | rtems_clock_tick(); |
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| 123 | } |
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| 124 | |
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| 125 | /* User callback shell (set from Clock_Control) */ |
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| 126 | static void (*user_callback)(void); |
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| 127 | |
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| 128 | rtems_isr User_Clock_isr( |
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| 129 | rtems_vector_number vector |
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| 130 | ) |
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| 131 | { |
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| 132 | if (user_callback) |
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| 133 | user_callback(); |
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| 134 | } |
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| 135 | |
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| 136 | /* |
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| 137 | * Install_clock |
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| 138 | * |
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| 139 | * Install a clock tick handleR and reprograms the chip. This |
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| 140 | * is used to initially establish the clock tick. |
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| 141 | */ |
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| 142 | |
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| 143 | void Install_clock( |
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| 144 | rtems_isr_entry clock_isr |
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| 145 | ) |
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| 146 | { |
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[c63f6e2e] | 147 | /* |
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| 148 | * Initialize the clock tick device driver variables |
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| 149 | */ |
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| 150 | |
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| 151 | Clock_driver_ticks = 0; |
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| 152 | Clock_isrs = rtems_configuration_get_milliseconds_per_tick(); |
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| 153 | |
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| 154 | mips_timer_rate = rtems_configuration_get_microseconds_per_tick() * |
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| 155 | bsp_clicks_per_microsecond; |
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| 156 | |
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| 157 | /* |
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| 158 | * Hardware specific initialize goes here |
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| 159 | */ |
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[efdfd48] | 160 | |
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[c63f6e2e] | 161 | /* Set up USC heartbeat timer to generate interrupts */ |
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| 162 | disable_hbi(); /* Disable heartbeat interrupt in USC */ |
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[efdfd48] | 163 | |
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[0c0181d] | 164 | /* Install interrupt handler */ |
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| 165 | rtems_interrupt_handler_install( |
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| 166 | CLOCK_VECTOR, |
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| 167 | "clock", |
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| 168 | 0, |
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| 169 | USC_isr, |
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| 170 | NULL |
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| 171 | ); |
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[efdfd48] | 172 | |
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[c63f6e2e] | 173 | init_hbt(); /* Initialize heartbeat timer */ |
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[efdfd48] | 174 | |
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[c63f6e2e] | 175 | reset_wdt(); /* Reset watchdog timer */ |
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[efdfd48] | 176 | |
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[c63f6e2e] | 177 | enable_wdi(); /* Enable watchdog interrupt in USC */ |
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[efdfd48] | 178 | |
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[c63f6e2e] | 179 | enable_hbi(); /* Enable heartbeat interrupt in USC */ |
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[efdfd48] | 180 | |
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[c63f6e2e] | 181 | /* Enable USC interrupt in MIPS processor */ |
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| 182 | mips_enable_in_interrupt_mask(CLOCK_VECTOR_MASK); |
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[efdfd48] | 183 | |
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[c63f6e2e] | 184 | /* |
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| 185 | * Schedule the clock cleanup routine to execute if the application exits. |
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| 186 | */ |
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| 187 | |
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| 188 | atexit( Clock_exit ); |
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[7283768] | 189 | } |
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| 190 | |
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| 191 | /* |
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| 192 | * Clean up before the application exits |
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| 193 | */ |
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| 194 | |
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| 195 | void Clock_exit( void ) |
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| 196 | { |
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| 197 | /* mips: turn off the timer interrupts */ |
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| 198 | mips_disable_in_interrupt_mask(~CLOCK_VECTOR_MASK); |
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| 199 | } |
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| 200 | |
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[bb99cd0d] | 201 | void _Clock_Initialize( void ) |
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[7283768] | 202 | { |
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| 203 | Install_clock( Clock_isr ); |
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| 204 | } |
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