source: rtems/bsps/m68k/uC5282/include/bsp.h @ c9625a21

Last change on this file since c9625a21 was c991eeec, checked in by Sebastian Huber <sebastian.huber@…>, on 03/04/19 at 14:32:15

bsps: Adjust bsp.h Doxygen groups

Update #3706.

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File size: 5.6 KB
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1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsM68kUC5282
5 *
6 * @brief Global BSP definitions.
7 */
8
9/*
10 *  uC5282 BSP header file
11 *
12 *  Author: W. Eric Norum <norume@aps.anl.gov>
13 *
14 *  COPYRIGHT (c) 2005.
15 *  On-Line Applications Research Corporation (OAR).
16 *
17 *  The license and distribution terms for this file may be
18 *  found in the file LICENSE in this distribution or at
19 *  http://www.rtems.org/license/LICENSE.
20 */
21
22#ifndef LIBBSP_M68K_UC5282_BSP_H
23#define LIBBSP_M68K_UC5282_BSP_H
24
25/**
26 * @defgroup RTEMSBSPsM68kUC5282 uC5282
27 *
28 * @ingroup RTEMSBSPsM68k
29 *
30 * @brief uC5282 Board Support Package.
31 *
32 * @{
33 */
34
35#include <bspopts.h>
36#include <bsp/default-initial-extension.h>
37
38#include <rtems.h>
39#include <rtems/bspIo.h>
40
41#ifdef __cplusplus
42extern "C" {
43#endif
44
45/***************************************************************************/
46/**  BSP Configuration                                                    **/
47/*
48 * Uncomment to use instruction/data cache
49 * Leave commented to use instruction-only cache
50 */
51#define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE
52
53/***************************************************************************/
54/**  Hardware data structure headers                                      **/
55#include <mcf5282/mcf5282.h>   /* internal MCF5282 modules */
56
57/***************************************************************************/
58/**  Network driver configuration                                         **/
59struct rtems_bsdnet_ifconfig;
60extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
61#define RTEMS_BSP_NETWORK_DRIVER_NAME     "fs1"
62#define RTEMS_BSP_NETWORK_DRIVER_ATTACH   rtems_fec_driver_attach
63
64/***************************************************************************/
65/**  User Definable configuration                                         **/
66
67/* define which port the console should use - all other ports are then defined as general purpose */
68#define CONSOLE_PORT        0
69
70/* functions */
71
72typedef struct {
73    unsigned int l;
74    void        *v;
75} bsp_mnode_t;
76
77#define RTEMS_BSP_PGM_ERASE_FIRST   0x1
78#define RTEMS_BSP_PGM_RESET_AFTER   0x2
79#define RTEMS_BSP_PGM_EXEC_AFTER    0x4
80#define RTEMS_BSP_PGM_HALT_AFTER    0x8
81
82uint32_t bsp_get_CPU_clock_speed(void);
83rtems_status_code bsp_allocate_interrupt(int level, int priority);
84int bsp_sysReset(int flags);
85int bsp_program(bsp_mnode_t *chain, int flags);
86unsigned const char *bsp_gethwaddr(int a);
87const char *bsp_getbenv(const char *a);
88int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end);
89int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset);
90
91rtems_isr_entry set_vector(
92  rtems_isr_entry     handler,
93  rtems_vector_number vector,
94  int                 type
95);
96
97/*
98 * Interrupt assignments
99 *  Highest-priority listed first
100 */
101#define FEC_IRQ_LEVEL       4
102#define FEC_IRQ_RX_PRIORITY 7
103#define FEC_IRQ_TX_PRIORITY 6
104
105#define PIT3_IRQ_LEVEL      4
106#define PIT3_IRQ_PRIORITY   0
107
108#define UART0_IRQ_LEVEL     3
109#define UART0_IRQ_PRIORITY  7
110#define UART1_IRQ_LEVEL     3
111#define UART1_IRQ_PRIORITY  6
112#define UART2_IRQ_LEVEL     3
113#define UART2_IRQ_PRIORITY  5
114
115/*
116 * Fake VME support
117 * This makes it easier to use EPICS driver support on this BSP.
118 */
119#define VME_AM_STD_SUP_ASCENDING   0x3f
120#define VME_AM_STD_SUP_PGM         0x3e
121#define VME_AM_STD_USR_ASCENDING   0x3b
122#define VME_AM_STD_USR_PGM         0x3a
123#define VME_AM_STD_SUP_DATA        0x3d
124#define VME_AM_STD_USR_DATA        0x39
125#define VME_AM_EXT_SUP_ASCENDING   0x0f
126#define VME_AM_EXT_SUP_PGM         0x0e
127#define VME_AM_EXT_USR_ASCENDING   0x0b
128#define VME_AM_EXT_USR_PGM         0x0a
129#define VME_AM_EXT_SUP_DATA        0x0d
130#define VME_AM_EXT_USR_DATA        0x09
131#define VME_AM_SUP_SHORT_IO        0x2d
132#define VME_AM_USR_SHORT_IO        0x29
133
134/*
135 * 'Extended' BSP support
136 */
137rtems_status_code bspExtInit(void);
138typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector);
139BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg);
140int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
141int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
142int BSP_enableVME_int_lvl(unsigned int level);
143int BSP_disableVME_int_lvl(unsigned int level);
144int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr);
145
146/*
147 *  This BSP provides its own IDLE task to override the RTEMS one.
148 *  So we prototype it and define the constant confdefs.h expects
149 *  to configure a BSP specific one.
150 */
151void *bsp_idle_thread( uintptr_t ignored );
152#define BSP_IDLE_TASK_BODY bsp_idle_thread
153
154/*
155 *  The custom IDLE task keeps some idle statistics.
156 */
157int bsp_cpu_load_percentage(void);
158
159/*
160 *  This is a helper method to determine the cause of a reset.
161 */
162void bsp_reset_cause(char *buf, size_t capacity);
163
164/*
165 * SRAM. The BSP uses SRAM for maintaining some clock-driver data
166 *       and for ethernet descriptors (and the initial stack during
167 *       early boot).
168 */
169
170typedef struct mcf5282BufferDescriptor_ {
171    volatile uint16_t   status;
172    uint16_t                    length;
173    volatile void      *buffer;
174} mcf5282BufferDescriptor_t;
175
176extern struct {
177        uint32_t                  idle_counter;
178        uint32_t                  filtered_idle;
179        uint32_t                  max_idle_count;
180        uint32_t                  pitc_per_tick;
181        uint32_t                  nsec_per_pitc;
182        uint32_t                  pad[3]; /* align to 16-bytes for descriptors */
183        mcf5282BufferDescriptor_t fec_descriptors[];
184        /* buffer descriptors are allocated from here */
185
186    /* initial stack is at top of SRAM (start.S)  */
187} __SRAMBASE;
188
189#ifdef __cplusplus
190}
191#endif
192
193/** @} */
194
195#endif
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