1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup RTEMSBSPsM68kUC5282 |
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5 | * |
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6 | * @brief Global BSP definitions. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * uC5282 BSP header file |
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11 | * |
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12 | * Author: W. Eric Norum <norume@aps.anl.gov> |
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13 | * |
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14 | * COPYRIGHT (c) 2005. |
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15 | * On-Line Applications Research Corporation (OAR). |
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16 | * |
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17 | * The license and distribution terms for this file may be |
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18 | * found in the file LICENSE in this distribution or at |
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19 | * http://www.rtems.org/license/LICENSE. |
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20 | */ |
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21 | |
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22 | #ifndef LIBBSP_M68K_UC5282_BSP_H |
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23 | #define LIBBSP_M68K_UC5282_BSP_H |
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24 | |
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25 | /** |
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26 | * @defgroup RTEMSBSPsM68kUC5282 uC5282 |
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27 | * |
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28 | * @ingroup RTEMSBSPsM68k |
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29 | * |
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30 | * @brief uC5282 Board Support Package. |
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31 | * |
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32 | * @{ |
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33 | */ |
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34 | |
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35 | #include <bspopts.h> |
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36 | #include <bsp/default-initial-extension.h> |
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37 | |
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38 | #include <rtems.h> |
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39 | #include <rtems/bspIo.h> |
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40 | |
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41 | #ifdef __cplusplus |
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42 | extern "C" { |
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43 | #endif |
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44 | |
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45 | /***************************************************************************/ |
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46 | /** BSP Configuration **/ |
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47 | /* |
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48 | * Uncomment to use instruction/data cache |
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49 | * Leave commented to use instruction-only cache |
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50 | */ |
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51 | #define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE |
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52 | |
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53 | /***************************************************************************/ |
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54 | /** Hardware data structure headers **/ |
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55 | #include <mcf5282/mcf5282.h> /* internal MCF5282 modules */ |
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56 | |
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57 | /***************************************************************************/ |
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58 | /** Network driver configuration **/ |
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59 | struct rtems_bsdnet_ifconfig; |
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60 | extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching ); |
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61 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "fs1" |
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62 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_fec_driver_attach |
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63 | |
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64 | /***************************************************************************/ |
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65 | /** User Definable configuration **/ |
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66 | |
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67 | /* define which port the console should use - all other ports are then defined as general purpose */ |
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68 | #define CONSOLE_PORT 0 |
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69 | |
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70 | /* functions */ |
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71 | |
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72 | typedef struct { |
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73 | unsigned int l; |
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74 | void *v; |
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75 | } bsp_mnode_t; |
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76 | |
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77 | #define RTEMS_BSP_PGM_ERASE_FIRST 0x1 |
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78 | #define RTEMS_BSP_PGM_RESET_AFTER 0x2 |
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79 | #define RTEMS_BSP_PGM_EXEC_AFTER 0x4 |
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80 | #define RTEMS_BSP_PGM_HALT_AFTER 0x8 |
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81 | |
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82 | uint32_t bsp_get_CPU_clock_speed(void); |
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83 | rtems_status_code bsp_allocate_interrupt(int level, int priority); |
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84 | int bsp_sysReset(int flags); |
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85 | int bsp_program(bsp_mnode_t *chain, int flags); |
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86 | unsigned const char *bsp_gethwaddr(int a); |
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87 | const char *bsp_getbenv(const char *a); |
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88 | int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end); |
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89 | int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset); |
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90 | |
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91 | rtems_isr_entry set_vector( |
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92 | rtems_isr_entry handler, |
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93 | rtems_vector_number vector, |
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94 | int type |
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95 | ); |
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96 | |
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97 | /* |
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98 | * Interrupt assignments |
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99 | * Highest-priority listed first |
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100 | */ |
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101 | #define FEC_IRQ_LEVEL 4 |
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102 | #define FEC_IRQ_RX_PRIORITY 7 |
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103 | #define FEC_IRQ_TX_PRIORITY 6 |
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104 | |
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105 | #define PIT3_IRQ_LEVEL 4 |
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106 | #define PIT3_IRQ_PRIORITY 0 |
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107 | |
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108 | #define UART0_IRQ_LEVEL 3 |
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109 | #define UART0_IRQ_PRIORITY 7 |
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110 | #define UART1_IRQ_LEVEL 3 |
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111 | #define UART1_IRQ_PRIORITY 6 |
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112 | #define UART2_IRQ_LEVEL 3 |
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113 | #define UART2_IRQ_PRIORITY 5 |
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114 | |
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115 | /* |
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116 | * Fake VME support |
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117 | * This makes it easier to use EPICS driver support on this BSP. |
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118 | */ |
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119 | #define VME_AM_STD_SUP_ASCENDING 0x3f |
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120 | #define VME_AM_STD_SUP_PGM 0x3e |
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121 | #define VME_AM_STD_USR_ASCENDING 0x3b |
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122 | #define VME_AM_STD_USR_PGM 0x3a |
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123 | #define VME_AM_STD_SUP_DATA 0x3d |
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124 | #define VME_AM_STD_USR_DATA 0x39 |
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125 | #define VME_AM_EXT_SUP_ASCENDING 0x0f |
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126 | #define VME_AM_EXT_SUP_PGM 0x0e |
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127 | #define VME_AM_EXT_USR_ASCENDING 0x0b |
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128 | #define VME_AM_EXT_USR_PGM 0x0a |
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129 | #define VME_AM_EXT_SUP_DATA 0x0d |
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130 | #define VME_AM_EXT_USR_DATA 0x09 |
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131 | #define VME_AM_SUP_SHORT_IO 0x2d |
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132 | #define VME_AM_USR_SHORT_IO 0x29 |
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133 | |
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134 | /* |
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135 | * 'Extended' BSP support |
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136 | */ |
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137 | rtems_status_code bspExtInit(void); |
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138 | typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector); |
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139 | BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg); |
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140 | int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg); |
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141 | int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg); |
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142 | int BSP_enableVME_int_lvl(unsigned int level); |
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143 | int BSP_disableVME_int_lvl(unsigned int level); |
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144 | int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr); |
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145 | |
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146 | /* |
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147 | * This BSP provides its own IDLE task to override the RTEMS one. |
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148 | * So we prototype it and define the constant confdefs.h expects |
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149 | * to configure a BSP specific one. |
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150 | */ |
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151 | void *bsp_idle_thread( uintptr_t ignored ); |
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152 | #define BSP_IDLE_TASK_BODY bsp_idle_thread |
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153 | |
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154 | /* |
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155 | * The custom IDLE task keeps some idle statistics. |
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156 | */ |
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157 | int bsp_cpu_load_percentage(void); |
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158 | |
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159 | /* |
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160 | * This is a helper method to determine the cause of a reset. |
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161 | */ |
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162 | void bsp_reset_cause(char *buf, size_t capacity); |
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163 | |
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164 | /* |
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165 | * SRAM. The BSP uses SRAM for maintaining some clock-driver data |
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166 | * and for ethernet descriptors (and the initial stack during |
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167 | * early boot). |
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168 | */ |
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169 | |
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170 | typedef struct mcf5282BufferDescriptor_ { |
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171 | volatile uint16_t status; |
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172 | uint16_t length; |
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173 | volatile void *buffer; |
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174 | } mcf5282BufferDescriptor_t; |
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175 | |
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176 | extern struct { |
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177 | uint32_t idle_counter; |
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178 | uint32_t filtered_idle; |
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179 | uint32_t max_idle_count; |
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180 | uint32_t pitc_per_tick; |
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181 | uint32_t nsec_per_pitc; |
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182 | uint32_t pad[3]; /* align to 16-bytes for descriptors */ |
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183 | mcf5282BufferDescriptor_t fec_descriptors[]; |
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184 | /* buffer descriptors are allocated from here */ |
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185 | |
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186 | /* initial stack is at top of SRAM (start.S) */ |
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187 | } __SRAMBASE; |
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188 | |
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189 | #ifdef __cplusplus |
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190 | } |
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191 | #endif |
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192 | |
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193 | /** @} */ |
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194 | |
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195 | #endif |
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