source: rtems/bsps/m68k/uC5282/include/bsp.h @ 753873e5

Last change on this file since 753873e5 was 753873e5, checked in by Joel Sherrill <joel@…>, on 03/22/22 at 20:03:30

Update Eric Norum contact info and start to normalize file headers

  • Property mode set to 100644
File size: 5.5 KB
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1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsM68kUC5282
5 *
6 * @brief Global BSP definitions.
7 */
8
9/*
10 * Copyright (c) 2005 Eric Norum <eric@norum.ca>
11 *
12 * COPYRIGHT (c) 2005.
13 * On-Line Applications Research Corporation (OAR).
14 *
15 * The license and distribution terms for this file may be
16 * found in the file LICENSE in this distribution or at
17 * http://www.rtems.org/license/LICENSE.
18 */
19
20#ifndef LIBBSP_M68K_UC5282_BSP_H
21#define LIBBSP_M68K_UC5282_BSP_H
22
23/**
24 * @defgroup RTEMSBSPsM68kUC5282 uC5282
25 *
26 * @ingroup RTEMSBSPsM68k
27 *
28 * @brief uC5282 Board Support Package.
29 *
30 * @{
31 */
32
33#include <bspopts.h>
34#include <bsp/default-initial-extension.h>
35
36#include <rtems.h>
37#include <rtems/bspIo.h>
38
39#ifdef __cplusplus
40extern "C" {
41#endif
42
43/***************************************************************************/
44/**  BSP Configuration                                                    **/
45/*
46 * Uncomment to use instruction/data cache
47 * Leave commented to use instruction-only cache
48 */
49#define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE
50
51/***************************************************************************/
52/**  Hardware data structure headers                                      **/
53#include <mcf5282/mcf5282.h>   /* internal MCF5282 modules */
54
55/***************************************************************************/
56/**  Network driver configuration                                         **/
57struct rtems_bsdnet_ifconfig;
58extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
59#define RTEMS_BSP_NETWORK_DRIVER_NAME     "fs1"
60#define RTEMS_BSP_NETWORK_DRIVER_ATTACH   rtems_fec_driver_attach
61
62/***************************************************************************/
63/**  User Definable configuration                                         **/
64
65/* define which port the console should use - all other ports are then defined as general purpose */
66#define CONSOLE_PORT        0
67
68/* functions */
69
70typedef struct {
71    unsigned int l;
72    void        *v;
73} bsp_mnode_t;
74
75#define RTEMS_BSP_PGM_ERASE_FIRST   0x1
76#define RTEMS_BSP_PGM_RESET_AFTER   0x2
77#define RTEMS_BSP_PGM_EXEC_AFTER    0x4
78#define RTEMS_BSP_PGM_HALT_AFTER    0x8
79
80uint32_t bsp_get_CPU_clock_speed(void);
81rtems_status_code bsp_allocate_interrupt(int level, int priority);
82int bsp_sysReset(int flags);
83int bsp_program(bsp_mnode_t *chain, int flags);
84unsigned const char *bsp_gethwaddr(int a);
85const char *bsp_getbenv(const char *a);
86int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end);
87int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset);
88
89rtems_isr_entry set_vector(
90  rtems_isr_entry     handler,
91  rtems_vector_number vector,
92  int                 type
93);
94
95/*
96 * Interrupt assignments
97 *  Highest-priority listed first
98 */
99#define FEC_IRQ_LEVEL       4
100#define FEC_IRQ_RX_PRIORITY 7
101#define FEC_IRQ_TX_PRIORITY 6
102
103#define PIT3_IRQ_LEVEL      4
104#define PIT3_IRQ_PRIORITY   0
105
106#define UART0_IRQ_LEVEL     3
107#define UART0_IRQ_PRIORITY  7
108#define UART1_IRQ_LEVEL     3
109#define UART1_IRQ_PRIORITY  6
110#define UART2_IRQ_LEVEL     3
111#define UART2_IRQ_PRIORITY  5
112
113/*
114 * Fake VME support
115 * This makes it easier to use EPICS driver support on this BSP.
116 */
117#define VME_AM_STD_SUP_ASCENDING   0x3f
118#define VME_AM_STD_SUP_PGM         0x3e
119#define VME_AM_STD_USR_ASCENDING   0x3b
120#define VME_AM_STD_USR_PGM         0x3a
121#define VME_AM_STD_SUP_DATA        0x3d
122#define VME_AM_STD_USR_DATA        0x39
123#define VME_AM_EXT_SUP_ASCENDING   0x0f
124#define VME_AM_EXT_SUP_PGM         0x0e
125#define VME_AM_EXT_USR_ASCENDING   0x0b
126#define VME_AM_EXT_USR_PGM         0x0a
127#define VME_AM_EXT_SUP_DATA        0x0d
128#define VME_AM_EXT_USR_DATA        0x09
129#define VME_AM_SUP_SHORT_IO        0x2d
130#define VME_AM_USR_SHORT_IO        0x29
131
132/*
133 * 'Extended' BSP support
134 */
135rtems_status_code bspExtInit(void);
136typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector);
137BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg);
138int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
139int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
140int BSP_enableVME_int_lvl(unsigned int level);
141int BSP_disableVME_int_lvl(unsigned int level);
142int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr);
143
144/*
145 *  This BSP provides its own IDLE task to override the RTEMS one.
146 *  So we prototype it and define the constant confdefs.h expects
147 *  to configure a BSP specific one.
148 */
149void *bsp_idle_thread( uintptr_t ignored );
150#define BSP_IDLE_TASK_BODY bsp_idle_thread
151
152/*
153 *  The custom IDLE task keeps some idle statistics.
154 */
155int bsp_cpu_load_percentage(void);
156
157/*
158 *  This is a helper method to determine the cause of a reset.
159 */
160void bsp_reset_cause(char *buf, size_t capacity);
161
162/*
163 * SRAM. The BSP uses SRAM for maintaining some clock-driver data
164 *       and for ethernet descriptors (and the initial stack during
165 *       early boot).
166 */
167
168typedef struct mcf5282BufferDescriptor_ {
169    volatile uint16_t   status;
170    uint16_t                    length;
171    volatile void      *buffer;
172} mcf5282BufferDescriptor_t;
173
174extern struct {
175        uint32_t                  idle_counter;
176        uint32_t                  filtered_idle;
177        uint32_t                  max_idle_count;
178        uint32_t                  pitc_per_tick;
179        uint32_t                  nsec_per_pitc;
180        uint32_t                  pad[3]; /* align to 16-bytes for descriptors */
181        mcf5282BufferDescriptor_t fec_descriptors[];
182        /* buffer descriptors are allocated from here */
183
184    /* initial stack is at top of SRAM (start.S)  */
185} __SRAMBASE;
186
187#ifdef __cplusplus
188}
189#endif
190
191/** @} */
192
193#endif
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