[ac7d5ef0] | 1 | /* entry.s |
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| 2 | * |
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| 3 | * This file contains the entry point for the application. |
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| 4 | * The name of this entry point is compiler dependent. |
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| 5 | * It jumps to the BSP which is responsible for performing |
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| 6 | * all initialization. |
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| 7 | * |
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[08311cc3] | 8 | * COPYRIGHT (c) 1989-1999. |
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[ac7d5ef0] | 9 | * On-Line Applications Research Corporation (OAR). |
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| 10 | * |
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[98e4ebf5] | 11 | * The license and distribution terms for this file may be |
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| 12 | * found in the file LICENSE in this distribution or at |
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[c499856] | 13 | * http://www.rtems.org/license/LICENSE. |
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[ac7d5ef0] | 14 | */ |
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| 15 | |
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[d79aa47d] | 16 | #include <rtems/asm.h> |
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[ac7d5ef0] | 17 | |
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[906577f4] | 18 | #if (M68K_COLDFIRE_ARCH == 0) /* All ColdFire BSPs must provide their own start vector */ |
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| 19 | |
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[ac7d5ef0] | 20 | BEGIN_CODE |
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| 21 | | Default entry points for: |
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| 22 | PUBLIC (start) | GNU |
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| 23 | PUBLIC (M68Kvec) | Vector Table |
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| 24 | |
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| 25 | SYM (start): |
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[7e19c72b] | 26 | SYM (M68Kvec): | standard location for vectors |
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[ac7d5ef0] | 27 | nop | for linkers with problem |
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| 28 | | location zero |
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| 29 | jmp SYM (start_around) |
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| 30 | |
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| 31 | /* |
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| 32 | * We can use the following space as our vector table |
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| 33 | * if the CPU has a VBR or we can save vector table in it |
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| 34 | * if the CPU does not. |
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| 35 | */ |
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| 36 | |
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| 37 | .space 4088 | to avoid initial intr stack |
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| 38 | | from 135BUG on MVME13? |
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| 39 | | and start code at 0x4000 |
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| 40 | SYM (vectors): |
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| 41 | .space 1016 | reserve space for rest of vectors |
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| 42 | |
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| 43 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 44 | SYM (lowintstack): |
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| 45 | .space 4092 | reserve for interrupt stack |
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| 46 | SYM (hiintstack): |
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| 47 | .space 4 | end of interrupt stack |
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| 48 | #endif |
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| 49 | |
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| 50 | PUBLIC (start_around) |
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| 51 | SYM (start_around): |
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| 52 | move.w sr, SYM (initial_sr) |
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[7e19c72b] | 53 | oriw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! |
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[ac7d5ef0] | 54 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 55 | movec isp,a0 |
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| 56 | move.l a0, SYM (initial_isp) |
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[9898425] | 57 | movec usp,a0 |
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[ac7d5ef0] | 58 | move.l a0, SYM (initial_usp) |
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[9898425] | 59 | movec msp,a0 |
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| 60 | move.l a0, SYM (initial_msp) |
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| 61 | #else |
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[ac7d5ef0] | 62 | move.l a7, SYM (initial_msp) |
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[9898425] | 63 | #endif |
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[ac7d5ef0] | 64 | |
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| 65 | | |
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| 66 | | zero out uninitialized data area |
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| 67 | | |
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| 68 | zerobss: |
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[449905a8] | 69 | moveal # SYM (bsp_section_bss_end),a0 | find end of .bss |
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| 70 | moveal # SYM (bsp_section_bss_begin),a1 | find beginning of .bss |
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[ac7d5ef0] | 71 | movel #0,d0 |
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| 72 | |
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[7e19c72b] | 73 | loop: movel #0,a1@+ | to zero out uninitialized |
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[ac7d5ef0] | 74 | cmpal a0,a1 |
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| 75 | jlt loop | loop until _end reached |
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| 76 | |
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[ff081aee] | 77 | movel # SYM (_ISR_Stack_area_end),d0 | d0 = stop of stack |
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[7e19c72b] | 78 | movw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! |
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| 79 | movel d0,a7 | set master stack pointer |
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| 80 | movel d0,a6 | set base pointer |
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[ac7d5ef0] | 81 | |
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| 82 | /* |
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[e2a2ec60] | 83 | * RTEMS should maintain a separate interrupt stack on CPUs |
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[ac7d5ef0] | 84 | * without one in hardware. This is currently not supported |
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| 85 | * on versions of the m68k without a HW intr stack. |
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| 86 | */ |
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| 87 | |
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| 88 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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[7e19c72b] | 89 | lea SYM (hiintstack),a0 | a0 = high end of intr stack |
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[ac7d5ef0] | 90 | movec a0,isp | set interrupt stack |
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| 91 | #endif |
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[3a4ae6c] | 92 | |
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[3d477da0] | 93 | movel #0,a7@- | push command line |
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[e2a2ec60] | 94 | jsr SYM (boot_card) |
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[3a4ae6c] | 95 | addl #12,a7 |
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| 96 | |
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[ac7d5ef0] | 97 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 98 | move.l SYM (initial_isp),a0 |
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| 99 | movec a0,isp |
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| 100 | move.l SYM (initial_usp),a0 |
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| 101 | movec a0,usp |
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| 102 | move.l SYM (initial_msp),a0 |
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| 103 | movec a0,msp |
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| 104 | #else |
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| 105 | movea.l SYM (initial_msp),a7 |
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| 106 | #endif |
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| 107 | move.w SYM (initial_sr),sr |
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| 108 | rts |
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| 109 | |
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| 110 | END_CODE |
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| 111 | |
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| 112 | BEGIN_DATA |
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| 113 | |
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| 114 | PUBLIC (start_frame) |
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| 115 | SYM (start_frame): |
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| 116 | .space 4,0 |
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| 117 | |
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| 118 | END_DATA |
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| 119 | |
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| 120 | BEGIN_BSS |
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| 121 | |
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| 122 | PUBLIC (initial_isp) |
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| 123 | SYM (initial_isp): |
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| 124 | .space 4 |
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| 125 | |
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| 126 | PUBLIC (initial_msp) |
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| 127 | SYM (initial_msp): |
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| 128 | .space 4 |
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| 129 | |
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| 130 | PUBLIC (initial_usp) |
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| 131 | SYM (initial_usp): |
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| 132 | .space 4 |
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| 133 | |
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| 134 | PUBLIC (initial_sr) |
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| 135 | SYM (initial_sr): |
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| 136 | .space 2 |
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| 137 | |
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| 138 | END_DATA |
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[906577f4] | 139 | #endif |
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[ac7d5ef0] | 140 | END |
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