source: rtems/bsps/m68k/shared/fpsp/sto_res.S @ d584269

5
Last change on this file since d584269 was 3cf2bf63, checked in by Sebastian Huber <sebastian.huber@…>, on 03/26/18 at 10:17:06

bsps/m68k: Move fpsp support to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 2.0 KB
Line 
1#include "fpsp-namespace.h"
2//
3//
4//      sto_res.sa 3.1 12/10/90
5//
6//      Takes the result and puts it in where the user expects it.
7//      Library functions return result in fp0. If fp0 is not the
8//      users destination register then fp0 is moved to the the
9//      correct floating-point destination register.  fp0 and fp1
10//      are then restored to the original contents.
11//
12//      Input:  result in fp0,fp1
13//
14//              d2 & a0 should be kept unmodified
15//
16//      Output: moves the result to the true destination reg or mem
17//
18//      Modifies: destination floating point register
19//
20
21//              Copyright (C) Motorola, Inc. 1990
22//                      All Rights Reserved
23//
24//      THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
25//      The copyright notice above does not evidence any
26//      actual or intended publication of such source code.
27
28STO_RES:        //idnt  2,1 | Motorola 040 Floating Point Software Package
29
30
31        |section        8
32
33#include "fpsp.defs"
34
35        .global sto_cos
36sto_cos:
37        bfextu          CMDREG1B(%a6){#13:#3},%d0       //extract cos destination
38        cmpib           #3,%d0          //check for fp0/fp1 cases
39        bles            c_fp0123
40        fmovemx %fp1-%fp1,-(%a7)
41        moveql          #7,%d1
42        subl            %d0,%d1         //d1 = 7- (dest. reg. no.)
43        clrl            %d0
44        bsetl           %d1,%d0         //d0 is dynamic register mask
45        fmovemx (%a7)+,%d0
46        rts
47c_fp0123:
48        cmpib           #0,%d0
49        beqs            c_is_fp0
50        cmpib           #1,%d0
51        beqs            c_is_fp1
52        cmpib           #2,%d0
53        beqs            c_is_fp2
54c_is_fp3:
55        fmovemx %fp1-%fp1,USER_FP3(%a6)
56        rts
57c_is_fp2:
58        fmovemx %fp1-%fp1,USER_FP2(%a6)
59        rts
60c_is_fp1:
61        fmovemx %fp1-%fp1,USER_FP1(%a6)
62        rts
63c_is_fp0:
64        fmovemx %fp1-%fp1,USER_FP0(%a6)
65        rts
66
67
68        .global sto_res
69sto_res:
70        bfextu          CMDREG1B(%a6){#6:#3},%d0        //extract destination register
71        cmpib           #3,%d0          //check for fp0/fp1 cases
72        bles            fp0123
73        fmovemx %fp0-%fp0,-(%a7)
74        moveql          #7,%d1
75        subl            %d0,%d1         //d1 = 7- (dest. reg. no.)
76        clrl            %d0
77        bsetl           %d1,%d0         //d0 is dynamic register mask
78        fmovemx (%a7)+,%d0
79        rts
80fp0123:
81        cmpib           #0,%d0
82        beqs            is_fp0
83        cmpib           #1,%d0
84        beqs            is_fp1
85        cmpib           #2,%d0
86        beqs            is_fp2
87is_fp3:
88        fmovemx %fp0-%fp0,USER_FP3(%a6)
89        rts
90is_fp2:
91        fmovemx %fp0-%fp0,USER_FP2(%a6)
92        rts
93is_fp1:
94        fmovemx %fp0-%fp0,USER_FP1(%a6)
95        rts
96is_fp0:
97        fmovemx %fp0-%fp0,USER_FP0(%a6)
98        rts
99
100        |end
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