source: rtems/bsps/m68k/shared/fpsp/rtems_fpsp.c @ 5c6edee

Last change on this file since 5c6edee was 5c6edee, checked in by Sebastian Huber <sebastian.huber@…>, on Nov 8, 2018 at 2:44:56 PM

m68k: Remove use of proc_ptr

Update #3585.

  • Property mode set to 100644
File size: 2.4 KB
Line 
1#include <rtems/system.h>
2/*
3#include <rtems/score/isr.h>
4*/
5
6/*
7 * User exception handlers
8 */
9CPU_ISR_raw_handler M68040FPSPUserExceptionHandlers[9];
10
11/*
12 * Intercept requests to install an exception handler.
13 * FPSP exceptions get special treatment.
14 */
15static int
16FPSP_install_raw_handler(
17  uint32_t vector,
18  CPU_ISR_raw_handler new_handler,
19  CPU_ISR_raw_handler *old_handler
20)
21{
22  int fpspVector;
23
24  switch (vector) {
25  default:      return 0;       /* Non-FPSP vector */
26  case 11:      fpspVector = 0; break;  /* F-line */
27  case 48:      fpspVector = 1; break;  /* BSUN */
28  case 49:      fpspVector = 2; break;  /* INEXACT */
29  case 50:      fpspVector = 3; break;  /* DIVIDE-BY-ZERO */
30  case 51:      fpspVector = 4; break;  /* UNDERFLOW */
31  case 52:      fpspVector = 5; break;  /* OPERAND ERROR */
32  case 53:      fpspVector = 6; break;  /* OVERFLOW */
33  case 54:      fpspVector = 7; break;  /* SIGNALLING NAN */
34  case 55:      fpspVector = 8; break;  /* UNIMPLEMENTED DATA TYPE */
35  }
36  *old_handler = M68040FPSPUserExceptionHandlers[fpspVector];
37  M68040FPSPUserExceptionHandlers[fpspVector] = new_handler;
38  return 1;
39}
40
41/*
42 *  Exception handlers provided by FPSP package.
43 */
44extern void _fpspEntry_fline(void);
45extern void _fpspEntry_bsun(void);
46extern void _fpspEntry_inex(void);
47extern void _fpspEntry_dz(void);
48extern void _fpspEntry_unfl(void);
49extern void _fpspEntry_ovfl(void);
50extern void _fpspEntry_operr(void);
51extern void _fpspEntry_snan(void);
52extern void _fpspEntry_unsupp(void);
53
54/*
55 * Attach floating point exception vectors to M68040FPSP entry points
56 *
57 *  NOTE: Uses M68K rather than M68040 in the name so all CPUs having
58 *        an FPSP can share the same code in RTEMS proper.
59 */
60void
61M68KFPSPInstallExceptionHandlers (void)
62{
63  static struct {
64    int  vector_number;
65    void  (*handler)(void);
66  } fpspHandlers[] = {
67    { 11,  _fpspEntry_fline },
68    { 48,  _fpspEntry_bsun },
69    { 49,  _fpspEntry_inex },
70    { 50,  _fpspEntry_dz },
71    { 51,  _fpspEntry_unfl },
72    { 52,  _fpspEntry_operr },
73    { 53,  _fpspEntry_ovfl },
74    { 54,  _fpspEntry_snan },
75    { 55,  _fpspEntry_unsupp },
76  };
77  int i;
78  CPU_ISR_raw_handler oldHandler;
79
80  for (i = 0 ; i < sizeof fpspHandlers / sizeof fpspHandlers[0] ; i++) {
81    _CPU_ISR_install_raw_handler(fpspHandlers[i].vector_number, fpspHandlers[i].handler, &oldHandler);
82      M68040FPSPUserExceptionHandlers[i] = oldHandler;
83  }
84  _FPSP_install_raw_handler = FPSP_install_raw_handler;
85}
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