1 | #include "fpsp-namespace.h" |
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2 | // |
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3 | // |
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4 | // do_func.sa 3.4 2/18/91 |
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5 | // |
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6 | // Do_func performs the unimplemented operation. The operation |
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7 | // to be performed is determined from the lower 7 bits of the |
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8 | // extension word (except in the case of fmovecr and fsincos). |
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9 | // The opcode and tag bits form an index into a jump table in |
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10 | // tbldo.sa. Cases of zero, infinity and NaN are handled in |
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11 | // do_func by forcing the default result. Normalized and |
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12 | // denormalized (there are no unnormalized numbers at this |
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13 | // point) are passed onto the emulation code. |
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14 | // |
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15 | // CMDREG1B and STAG are extracted from the fsave frame |
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16 | // and combined to form the table index. The function called |
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17 | // will start with a0 pointing to the ETEMP operand. Dyadic |
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18 | // functions can find FPTEMP at -12(a0). |
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19 | // |
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20 | // Called functions return their result in fp0. Sincos returns |
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21 | // sin(x) in fp0 and cos(x) in fp1. |
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22 | // |
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23 | |
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24 | // Copyright (C) Motorola, Inc. 1990 |
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25 | // All Rights Reserved |
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26 | // |
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27 | // THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA |
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28 | // The copyright notice above does not evidence any |
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29 | // actual or intended publication of such source code. |
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30 | |
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31 | DO_FUNC: //idnt 2,1 | Motorola 040 Floating Point Software Package |
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32 | |
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33 | |section 8 |
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34 | |
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35 | #include "fpsp.defs" |
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36 | |
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37 | |xref t_dz2 |
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38 | |xref t_operr |
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39 | |xref t_inx2 |
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40 | |xref t_resdnrm |
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41 | |xref dst_nan |
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42 | |xref src_nan |
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43 | |xref nrm_set |
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44 | |xref sto_cos |
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45 | |
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46 | |xref tblpre |
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47 | |xref slognp1,slogn,slog10,slog2 |
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48 | |xref slognd,slog10d,slog2d |
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49 | |xref smod,srem |
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50 | |xref sscale |
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51 | |xref smovcr |
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52 | |
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53 | PONE: .long 0x3fff0000,0x80000000,0x00000000 //+1 |
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54 | MONE: .long 0xbfff0000,0x80000000,0x00000000 //-1 |
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55 | PZERO: .long 0x00000000,0x00000000,0x00000000 //+0 |
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56 | MZERO: .long 0x80000000,0x00000000,0x00000000 //-0 |
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57 | PINF: .long 0x7fff0000,0x00000000,0x00000000 //+inf |
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58 | MINF: .long 0xffff0000,0x00000000,0x00000000 //-inf |
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59 | QNAN: .long 0x7fff0000,0xffffffff,0xffffffff //non-signaling nan |
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60 | PPIBY2: .long 0x3FFF0000,0xC90FDAA2,0x2168C235 //+PI/2 |
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61 | MPIBY2: .long 0xbFFF0000,0xC90FDAA2,0x2168C235 //-PI/2 |
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62 | |
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63 | .global do_func |
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64 | do_func: |
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65 | clrb CU_ONLY(%a6) |
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66 | // |
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67 | // Check for fmovecr. It does not follow the format of fp gen |
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68 | // unimplemented instructions. The test is on the upper 6 bits; |
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69 | // if they are $17, the inst is fmovecr. Call entry smovcr |
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70 | // directly. |
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71 | // |
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72 | bfextu CMDREG1B(%a6){#0:#6},%d0 //get opclass and src fields |
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73 | cmpil #0x17,%d0 //if op class and size fields are $17, |
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74 | // ;it is FMOVECR; if not, continue |
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75 | bnes not_fmovecr |
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76 | jmp smovcr //fmovecr; jmp directly to emulation |
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77 | |
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78 | not_fmovecr: |
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79 | movew CMDREG1B(%a6),%d0 |
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80 | andl #0x7F,%d0 |
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81 | cmpil #0x38,%d0 //if the extension is >= $38, |
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82 | bge serror //it is illegal |
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83 | bfextu STAG(%a6){#0:#3},%d1 |
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84 | lsll #3,%d0 //make room for STAG |
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85 | addl %d1,%d0 //combine for final index into table |
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86 | leal tblpre,%a1 //start of monster jump table |
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87 | movel (%a1,%d0.w*4),%a1 //real target address |
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88 | leal ETEMP(%a6),%a0 //a0 is pointer to src op |
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89 | movel USER_FPCR(%a6),%d1 |
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90 | andl #0xFF,%d1 // discard all but rounding mode/prec |
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91 | fmovel #0,%fpcr |
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92 | jmp (%a1) |
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93 | // |
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94 | // ERROR |
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95 | // |
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96 | .global serror |
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97 | serror: |
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98 | st STORE_FLG(%a6) |
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99 | rts |
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100 | // |
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101 | // These routines load forced values into fp0. They are called |
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102 | // by index into tbldo. |
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103 | // |
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104 | // Load a signed zero to fp0 and set inex2/ainex |
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105 | // |
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106 | .global snzrinx |
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107 | snzrinx: |
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108 | btstb #sign_bit,LOCAL_EX(%a0) //get sign of source operand |
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109 | bnes ld_mzinx //if negative, branch |
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110 | bsr ld_pzero //bsr so we can return and set inx |
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111 | bra t_inx2 //now, set the inx for the next inst |
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112 | ld_mzinx: |
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113 | bsr ld_mzero //if neg, load neg zero, return here |
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114 | bra t_inx2 //now, set the inx for the next inst |
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115 | // |
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116 | // Load a signed zero to fp0; do not set inex2/ainex |
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117 | // |
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118 | .global szero |
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119 | szero: |
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120 | btstb #sign_bit,LOCAL_EX(%a0) //get sign of source operand |
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121 | bne ld_mzero //if neg, load neg zero |
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122 | bra ld_pzero //load positive zero |
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123 | // |
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124 | // Load a signed infinity to fp0; do not set inex2/ainex |
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125 | // |
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126 | .global sinf |
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127 | sinf: |
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128 | btstb #sign_bit,LOCAL_EX(%a0) //get sign of source operand |
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129 | bne ld_minf //if negative branch |
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130 | bra ld_pinf |
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131 | // |
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132 | // Load a signed one to fp0; do not set inex2/ainex |
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133 | // |
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134 | .global sone |
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135 | sone: |
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136 | btstb #sign_bit,LOCAL_EX(%a0) //check sign of source |
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137 | bne ld_mone |
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138 | bra ld_pone |
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139 | // |
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140 | // Load a signed pi/2 to fp0; do not set inex2/ainex |
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141 | // |
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142 | .global spi_2 |
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143 | spi_2: |
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144 | btstb #sign_bit,LOCAL_EX(%a0) //check sign of source |
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145 | bne ld_mpi2 |
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146 | bra ld_ppi2 |
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147 | // |
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148 | // Load either a +0 or +inf for plus/minus operand |
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149 | // |
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150 | .global szr_inf |
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151 | szr_inf: |
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152 | btstb #sign_bit,LOCAL_EX(%a0) //check sign of source |
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153 | bne ld_pzero |
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154 | bra ld_pinf |
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155 | // |
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156 | // Result is either an operr or +inf for plus/minus operand |
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157 | // [Used by slogn, slognp1, slog10, and slog2] |
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158 | // |
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159 | .global sopr_inf |
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160 | sopr_inf: |
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161 | btstb #sign_bit,LOCAL_EX(%a0) //check sign of source |
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162 | bne t_operr |
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163 | bra ld_pinf |
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164 | // |
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165 | // FLOGNP1 |
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166 | // |
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167 | .global sslognp1 |
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168 | sslognp1: |
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169 | fmovemx (%a0),%fp0-%fp0 |
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170 | fcmpb #-1,%fp0 |
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171 | fbgt slognp1 |
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172 | fbeq t_dz2 //if = -1, divide by zero exception |
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173 | fmovel #0,%FPSR //clr N flag |
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174 | bra t_operr //take care of operands < -1 |
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175 | // |
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176 | // FETOXM1 |
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177 | // |
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178 | .global setoxm1i |
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179 | setoxm1i: |
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180 | btstb #sign_bit,LOCAL_EX(%a0) //check sign of source |
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181 | bne ld_mone |
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182 | bra ld_pinf |
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183 | // |
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184 | // FLOGN |
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185 | // |
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186 | // Test for 1.0 as an input argument, returning +zero. Also check |
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187 | // the sign and return operr if negative. |
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188 | // |
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189 | .global sslogn |
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190 | sslogn: |
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191 | btstb #sign_bit,LOCAL_EX(%a0) |
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192 | bne t_operr //take care of operands < 0 |
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193 | cmpiw #0x3fff,LOCAL_EX(%a0) //test for 1.0 input |
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194 | bne slogn |
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195 | cmpil #0x80000000,LOCAL_HI(%a0) |
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196 | bne slogn |
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197 | tstl LOCAL_LO(%a0) |
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198 | bne slogn |
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199 | fmovex PZERO,%fp0 |
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200 | rts |
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201 | |
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202 | .global sslognd |
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203 | sslognd: |
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204 | btstb #sign_bit,LOCAL_EX(%a0) |
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205 | beq slognd |
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206 | bra t_operr //take care of operands < 0 |
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207 | |
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208 | // |
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209 | // FLOG10 |
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210 | // |
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211 | .global sslog10 |
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212 | sslog10: |
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213 | btstb #sign_bit,LOCAL_EX(%a0) |
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214 | bne t_operr //take care of operands < 0 |
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215 | cmpiw #0x3fff,LOCAL_EX(%a0) //test for 1.0 input |
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216 | bne slog10 |
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217 | cmpil #0x80000000,LOCAL_HI(%a0) |
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218 | bne slog10 |
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219 | tstl LOCAL_LO(%a0) |
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220 | bne slog10 |
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221 | fmovex PZERO,%fp0 |
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222 | rts |
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223 | |
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224 | .global sslog10d |
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225 | sslog10d: |
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226 | btstb #sign_bit,LOCAL_EX(%a0) |
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227 | beq slog10d |
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228 | bra t_operr //take care of operands < 0 |
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229 | |
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230 | // |
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231 | // FLOG2 |
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232 | // |
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233 | .global sslog2 |
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234 | sslog2: |
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235 | btstb #sign_bit,LOCAL_EX(%a0) |
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236 | bne t_operr //take care of operands < 0 |
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237 | cmpiw #0x3fff,LOCAL_EX(%a0) //test for 1.0 input |
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238 | bne slog2 |
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239 | cmpil #0x80000000,LOCAL_HI(%a0) |
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240 | bne slog2 |
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241 | tstl LOCAL_LO(%a0) |
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242 | bne slog2 |
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243 | fmovex PZERO,%fp0 |
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244 | rts |
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245 | |
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246 | .global sslog2d |
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247 | sslog2d: |
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248 | btstb #sign_bit,LOCAL_EX(%a0) |
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249 | beq slog2d |
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250 | bra t_operr //take care of operands < 0 |
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251 | |
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252 | // |
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253 | // FMOD |
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254 | // |
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255 | pmodt: |
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256 | // ;$21 fmod |
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257 | // ;dtag,stag |
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258 | .long smod // 00,00 norm,norm = normal |
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259 | .long smod_oper // 00,01 norm,zero = nan with operr |
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260 | .long smod_fpn // 00,10 norm,inf = fpn |
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261 | .long smod_snan // 00,11 norm,nan = nan |
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262 | .long smod_zro // 01,00 zero,norm = +-zero |
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263 | .long smod_oper // 01,01 zero,zero = nan with operr |
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264 | .long smod_zro // 01,10 zero,inf = +-zero |
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265 | .long smod_snan // 01,11 zero,nan = nan |
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266 | .long smod_oper // 10,00 inf,norm = nan with operr |
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267 | .long smod_oper // 10,01 inf,zero = nan with operr |
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268 | .long smod_oper // 10,10 inf,inf = nan with operr |
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269 | .long smod_snan // 10,11 inf,nan = nan |
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270 | .long smod_dnan // 11,00 nan,norm = nan |
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271 | .long smod_dnan // 11,01 nan,zero = nan |
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272 | .long smod_dnan // 11,10 nan,inf = nan |
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273 | .long smod_dnan // 11,11 nan,nan = nan |
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274 | |
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275 | .global pmod |
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276 | pmod: |
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277 | clrb FPSR_QBYTE(%a6) // clear quotient field |
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278 | bfextu STAG(%a6){#0:#3},%d0 //stag = d0 |
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279 | bfextu DTAG(%a6){#0:#3},%d1 //dtag = d1 |
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280 | |
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281 | // |
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282 | // Alias extended denorms to norms for the jump table. |
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283 | // |
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284 | bclrl #2,%d0 |
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285 | bclrl #2,%d1 |
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286 | |
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287 | lslb #2,%d1 |
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288 | orb %d0,%d1 //d1{3:2} = dtag, d1{1:0} = stag |
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289 | // ;Tag values: |
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290 | // ;00 = norm or denorm |
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291 | // ;01 = zero |
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292 | // ;10 = inf |
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293 | // ;11 = nan |
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294 | lea pmodt,%a1 |
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295 | movel (%a1,%d1.w*4),%a1 |
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296 | jmp (%a1) |
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297 | |
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298 | smod_snan: |
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299 | bra src_nan |
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300 | smod_dnan: |
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301 | bra dst_nan |
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302 | smod_oper: |
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303 | bra t_operr |
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304 | smod_zro: |
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305 | moveb ETEMP(%a6),%d1 //get sign of src op |
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306 | moveb FPTEMP(%a6),%d0 //get sign of dst op |
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307 | eorb %d0,%d1 //get exor of sign bits |
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308 | btstl #7,%d1 //test for sign |
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309 | beqs smod_zsn //if clr, do not set sign big |
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310 | bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit |
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311 | smod_zsn: |
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312 | btstl #7,%d0 //test if + or - |
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313 | beq ld_pzero //if pos then load +0 |
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314 | bra ld_mzero //else neg load -0 |
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315 | |
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316 | smod_fpn: |
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317 | moveb ETEMP(%a6),%d1 //get sign of src op |
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318 | moveb FPTEMP(%a6),%d0 //get sign of dst op |
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319 | eorb %d0,%d1 //get exor of sign bits |
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320 | btstl #7,%d1 //test for sign |
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321 | beqs smod_fsn //if clr, do not set sign big |
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322 | bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit |
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323 | smod_fsn: |
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324 | tstb DTAG(%a6) //filter out denormal destination case |
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325 | bpls smod_nrm // |
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326 | leal FPTEMP(%a6),%a0 //a0<- addr(FPTEMP) |
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327 | bra t_resdnrm //force UNFL(but exact) result |
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328 | smod_nrm: |
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329 | fmovel USER_FPCR(%a6),%fpcr //use user's rmode and precision |
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330 | fmovex FPTEMP(%a6),%fp0 //return dest to fp0 |
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331 | rts |
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332 | |
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333 | // |
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334 | // FREM |
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335 | // |
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336 | premt: |
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337 | // ;$25 frem |
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338 | // ;dtag,stag |
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339 | .long srem // 00,00 norm,norm = normal |
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340 | .long srem_oper // 00,01 norm,zero = nan with operr |
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341 | .long srem_fpn // 00,10 norm,inf = fpn |
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342 | .long srem_snan // 00,11 norm,nan = nan |
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343 | .long srem_zro // 01,00 zero,norm = +-zero |
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344 | .long srem_oper // 01,01 zero,zero = nan with operr |
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345 | .long srem_zro // 01,10 zero,inf = +-zero |
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346 | .long srem_snan // 01,11 zero,nan = nan |
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347 | .long srem_oper // 10,00 inf,norm = nan with operr |
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348 | .long srem_oper // 10,01 inf,zero = nan with operr |
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349 | .long srem_oper // 10,10 inf,inf = nan with operr |
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350 | .long srem_snan // 10,11 inf,nan = nan |
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351 | .long srem_dnan // 11,00 nan,norm = nan |
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352 | .long srem_dnan // 11,01 nan,zero = nan |
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353 | .long srem_dnan // 11,10 nan,inf = nan |
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354 | .long srem_dnan // 11,11 nan,nan = nan |
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355 | |
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356 | .global prem |
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357 | prem: |
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358 | clrb FPSR_QBYTE(%a6) //clear quotient field |
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359 | bfextu STAG(%a6){#0:#3},%d0 //stag = d0 |
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360 | bfextu DTAG(%a6){#0:#3},%d1 //dtag = d1 |
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361 | // |
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362 | // Alias extended denorms to norms for the jump table. |
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363 | // |
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364 | bclr #2,%d0 |
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365 | bclr #2,%d1 |
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366 | |
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367 | lslb #2,%d1 |
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368 | orb %d0,%d1 //d1{3:2} = dtag, d1{1:0} = stag |
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369 | // ;Tag values: |
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370 | // ;00 = norm or denorm |
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371 | // ;01 = zero |
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372 | // ;10 = inf |
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373 | // ;11 = nan |
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374 | lea premt,%a1 |
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375 | movel (%a1,%d1.w*4),%a1 |
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376 | jmp (%a1) |
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377 | |
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378 | srem_snan: |
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379 | bra src_nan |
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380 | srem_dnan: |
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381 | bra dst_nan |
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382 | srem_oper: |
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383 | bra t_operr |
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384 | srem_zro: |
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385 | moveb ETEMP(%a6),%d1 //get sign of src op |
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386 | moveb FPTEMP(%a6),%d0 //get sign of dst op |
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387 | eorb %d0,%d1 //get exor of sign bits |
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388 | btstl #7,%d1 //test for sign |
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389 | beqs srem_zsn //if clr, do not set sign big |
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390 | bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit |
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391 | srem_zsn: |
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392 | btstl #7,%d0 //test if + or - |
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393 | beq ld_pzero //if pos then load +0 |
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394 | bra ld_mzero //else neg load -0 |
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395 | |
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396 | srem_fpn: |
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397 | moveb ETEMP(%a6),%d1 //get sign of src op |
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398 | moveb FPTEMP(%a6),%d0 //get sign of dst op |
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399 | eorb %d0,%d1 //get exor of sign bits |
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400 | btstl #7,%d1 //test for sign |
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401 | beqs srem_fsn //if clr, do not set sign big |
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402 | bsetb #q_sn_bit,FPSR_QBYTE(%a6) //set q-byte sign bit |
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403 | srem_fsn: |
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404 | tstb DTAG(%a6) //filter out denormal destination case |
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405 | bpls srem_nrm // |
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406 | leal FPTEMP(%a6),%a0 //a0<- addr(FPTEMP) |
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407 | bra t_resdnrm //force UNFL(but exact) result |
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408 | srem_nrm: |
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409 | fmovel USER_FPCR(%a6),%fpcr //use user's rmode and precision |
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410 | fmovex FPTEMP(%a6),%fp0 //return dest to fp0 |
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411 | rts |
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412 | // |
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413 | // FSCALE |
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414 | // |
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415 | pscalet: |
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416 | // ;$26 fscale |
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417 | // ;dtag,stag |
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418 | .long sscale // 00,00 norm,norm = result |
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419 | .long sscale // 00,01 norm,zero = fpn |
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420 | .long scl_opr // 00,10 norm,inf = nan with operr |
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421 | .long scl_snan // 00,11 norm,nan = nan |
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422 | .long scl_zro // 01,00 zero,norm = +-zero |
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423 | .long scl_zro // 01,01 zero,zero = +-zero |
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424 | .long scl_opr // 01,10 zero,inf = nan with operr |
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425 | .long scl_snan // 01,11 zero,nan = nan |
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426 | .long scl_inf // 10,00 inf,norm = +-inf |
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427 | .long scl_inf // 10,01 inf,zero = +-inf |
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428 | .long scl_opr // 10,10 inf,inf = nan with operr |
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429 | .long scl_snan // 10,11 inf,nan = nan |
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430 | .long scl_dnan // 11,00 nan,norm = nan |
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431 | .long scl_dnan // 11,01 nan,zero = nan |
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432 | .long scl_dnan // 11,10 nan,inf = nan |
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433 | .long scl_dnan // 11,11 nan,nan = nan |
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434 | |
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435 | .global pscale |
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436 | pscale: |
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437 | bfextu STAG(%a6){#0:#3},%d0 //stag in d0 |
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438 | bfextu DTAG(%a6){#0:#3},%d1 //dtag in d1 |
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439 | bclrl #2,%d0 //alias denorm into norm |
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440 | bclrl #2,%d1 //alias denorm into norm |
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441 | lslb #2,%d1 |
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442 | orb %d0,%d1 //d1{4:2} = dtag, d1{1:0} = stag |
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443 | // ;dtag values stag values: |
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444 | // ;000 = norm 00 = norm |
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445 | // ;001 = zero 01 = zero |
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446 | // ;010 = inf 10 = inf |
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447 | // ;011 = nan 11 = nan |
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448 | // ;100 = dnrm |
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449 | // |
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450 | // |
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451 | leal pscalet,%a1 //load start of jump table |
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452 | movel (%a1,%d1.w*4),%a1 //load a1 with label depending on tag |
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453 | jmp (%a1) //go to the routine |
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454 | |
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455 | scl_opr: |
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456 | bra t_operr |
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457 | |
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458 | scl_dnan: |
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459 | bra dst_nan |
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460 | |
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461 | scl_zro: |
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462 | btstb #sign_bit,FPTEMP_EX(%a6) //test if + or - |
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463 | beq ld_pzero //if pos then load +0 |
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464 | bra ld_mzero //if neg then load -0 |
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465 | scl_inf: |
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466 | btstb #sign_bit,FPTEMP_EX(%a6) //test if + or - |
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467 | beq ld_pinf //if pos then load +inf |
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468 | bra ld_minf //else neg load -inf |
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469 | scl_snan: |
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470 | bra src_nan |
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471 | // |
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472 | // FSINCOS |
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473 | // |
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474 | .global ssincosz |
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475 | ssincosz: |
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476 | btstb #sign_bit,ETEMP(%a6) //get sign |
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477 | beqs sincosp |
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478 | fmovex MZERO,%fp0 |
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479 | bras sincoscom |
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480 | sincosp: |
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481 | fmovex PZERO,%fp0 |
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482 | sincoscom: |
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483 | fmovemx PONE,%fp1-%fp1 //do not allow FPSR to be affected |
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484 | bra sto_cos //store cosine result |
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485 | |
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486 | .global ssincosi |
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487 | ssincosi: |
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488 | fmovex QNAN,%fp1 //load NAN |
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489 | bsr sto_cos //store cosine result |
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490 | fmovex QNAN,%fp0 //load NAN |
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491 | bra t_operr |
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492 | |
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493 | .global ssincosnan |
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494 | ssincosnan: |
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495 | movel ETEMP_EX(%a6),FP_SCR1(%a6) |
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496 | movel ETEMP_HI(%a6),FP_SCR1+4(%a6) |
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497 | movel ETEMP_LO(%a6),FP_SCR1+8(%a6) |
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498 | bsetb #signan_bit,FP_SCR1+4(%a6) |
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499 | fmovemx FP_SCR1(%a6),%fp1-%fp1 |
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500 | bsr sto_cos |
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501 | bra src_nan |
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502 | // |
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503 | // This code forces default values for the zero, inf, and nan cases |
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504 | // in the transcendentals code. The CC bits must be set in the |
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505 | // stacked FPSR to be correctly reported. |
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506 | // |
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507 | //**Returns +PI/2 |
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508 | .global ld_ppi2 |
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509 | ld_ppi2: |
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510 | fmovex PPIBY2,%fp0 //load +pi/2 |
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511 | bra t_inx2 //set inex2 exc |
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512 | |
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513 | //**Returns -PI/2 |
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514 | .global ld_mpi2 |
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515 | ld_mpi2: |
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516 | fmovex MPIBY2,%fp0 //load -pi/2 |
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517 | orl #neg_mask,USER_FPSR(%a6) //set N bit |
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518 | bra t_inx2 //set inex2 exc |
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519 | |
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520 | //**Returns +inf |
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521 | .global ld_pinf |
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522 | ld_pinf: |
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523 | fmovex PINF,%fp0 //load +inf |
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524 | orl #inf_mask,USER_FPSR(%a6) //set I bit |
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525 | rts |
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526 | |
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527 | //**Returns -inf |
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528 | .global ld_minf |
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529 | ld_minf: |
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530 | fmovex MINF,%fp0 //load -inf |
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531 | orl #neg_mask+inf_mask,USER_FPSR(%a6) //set N and I bits |
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532 | rts |
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533 | |
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534 | //**Returns +1 |
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535 | .global ld_pone |
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536 | ld_pone: |
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537 | fmovex PONE,%fp0 //load +1 |
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538 | rts |
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539 | |
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540 | //**Returns -1 |
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541 | .global ld_mone |
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542 | ld_mone: |
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543 | fmovex MONE,%fp0 //load -1 |
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544 | orl #neg_mask,USER_FPSR(%a6) //set N bit |
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545 | rts |
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546 | |
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547 | //**Returns +0 |
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548 | .global ld_pzero |
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549 | ld_pzero: |
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550 | fmovex PZERO,%fp0 //load +0 |
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551 | orl #z_mask,USER_FPSR(%a6) //set Z bit |
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552 | rts |
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553 | |
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554 | //**Returns -0 |
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555 | .global ld_mzero |
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556 | ld_mzero: |
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557 | fmovex MZERO,%fp0 //load -0 |
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558 | orl #neg_mask+z_mask,USER_FPSR(%a6) //set N and Z bits |
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559 | rts |
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560 | |
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561 | |end |
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