source: rtems/bsps/m68k/shared/cache/cache-mcf5225x.c @ d584269

5
Last change on this file since d584269 was 4cf93658, checked in by Sebastian Huber <sebastian.huber@…>, on 01/27/18 at 13:37:51

bsps: Rework cache manager implementation

The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.

Use the following directories and files:

  • bsps/shared/cache
  • bsps/@RTEMS_CPU@/shared/cache
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c

Update #3285.

  • Property mode set to 100644
File size: 1012 bytes
Line 
1/**
2 *  @file
3 *
4 *  Cache Management Support Routines for the MCF5225x
5 */
6
7#include <rtems.h>
8#include "cache.h"
9
10/*
11 * Cannot be frozen
12 */
13static void _CPU_cache_freeze_data(void) {}
14static void _CPU_cache_unfreeze_data(void) {}
15static void _CPU_cache_freeze_instruction(void) {}
16static void _CPU_cache_unfreeze_instruction(void) {}
17
18/*
19 * Write-through data cache -- flushes are unnecessary
20 */
21static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
22static void _CPU_cache_flush_entire_data(void) {}
23
24static void _CPU_cache_enable_instruction(void) {}
25static void _CPU_cache_disable_instruction(void) {}
26static void _CPU_cache_invalidate_entire_instruction(void) {}
27static void _CPU_cache_invalidate_1_instruction_line(const void *addr) {}
28
29static void _CPU_cache_enable_data(void) {}
30static void _CPU_cache_disable_data(void) {}
31static void _CPU_cache_invalidate_entire_data(void) {}
32static void _CPU_cache_invalidate_1_data_line(const void *addr) {}
33
34#include "../../../shared/cache/cacheimpl.h"
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