source: rtems/bsps/m68k/shared/cache/cache-mcf5223x.c

Last change on this file was a9a99164, checked in by Joel Sherrill <joel@…>, on 07/08/22 at 13:58:37

bsps/m68k/shared: Change license to BSD-2

Updates #3053.

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 *  COPYRIGHT (c) 1989-2008.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <rtems.h>
30#include <mcf5223x/mcf5223x.h>
31#include "cache.h"
32
33/*
34 * Cannot be frozen
35 */
36static void _CPU_cache_freeze_data(void) {}
37static void _CPU_cache_unfreeze_data(void) {}
38static void _CPU_cache_freeze_instruction(void) {}
39static void _CPU_cache_unfreeze_instruction(void) {}
40
41/*
42 * Write-through data cache -- flushes are unnecessary
43 */
44static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
45static void _CPU_cache_flush_entire_data(void) {}
46
47static void _CPU_cache_enable_instruction(void) {}
48static void _CPU_cache_disable_instruction(void) {}
49static void _CPU_cache_invalidate_entire_instruction(void) {}
50static void _CPU_cache_invalidate_1_instruction_line(const void *addr) {}
51
52static void _CPU_cache_enable_data(void) {}
53static void _CPU_cache_disable_data(void) {}
54static void _CPU_cache_invalidate_entire_data(void) {}
55static void _CPU_cache_invalidate_1_data_line(const void *addr) {}
56
57#include "../../../shared/cache/cacheimpl.h"
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