source: rtems/bsps/m68k/mvme167/net/uti596.h @ 031df391

5
Last change on this file since 031df391 was 031df391, checked in by Sebastian Huber <sebastian.huber@…>, on 04/23/18 at 07:53:31

bsps: Move legacy network drivers to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 9.5 KB
RevLine 
[5a23ca84]1/* uti596.h: Contains the defines and structures used by the uti596 driver */
2
3/*
4 * EII: March 11: Created v. 0.0
5 */
6
7#ifndef UTI596_H
8#define UTI596_H
9#include <rtems/error.h>
10#include <rtems/rtems_bsdnet.h>
11
12#include <sys/param.h>
13#include <sys/mbuf.h>
14#include <sys/socket.h>
15#include <sys/sockio.h>
16
17#include <net/if.h>
18
19#include <netinet/in.h>
20#include <netinet/if_ether.h>
21
22/* Ethernet statistics */
23
24struct enet_statistics{
25  int   rx_packets;                                                     /* total packets received */
26  int   tx_packets;                                                     /* total packets transmitted */
27  int   rx_errors;                                                      /* bad packets received */
28  int   tx_errors;                                                      /* packet transmit problems     */
29  int   rx_dropped;                                                     /* no space in buffers */
30  int   tx_dropped;
31  int   tx_retries_exceeded;  /* excessive retries */
32  int   multicast;                                                      /* multicast packets received   */
33  int   collisions;
34
35  /* detailed rx_errors: */
36  int   rx_length_errors;
37  int   rx_over_errors;                                 /* receiver ring buff overflow  */
38  int   rx_crc_errors;                                  /* recved pkt with crc error    */
39  int   rx_frame_errors;                                /* recv'd frame alignment error */
40  int   rx_fifo_errors;                                 /* recv'r fifo overrun          */
41  int   rx_missed_errors;                               /* receiver missed packet       */
42
43  /* detailed tx_errors */
44  int   tx_aborted_errors;
45  int   tx_carrier_errors;
46  int   tx_fifo_errors;
47  int   tx_heartbeat_errors;
48  int   tx_window_errors;
49
50  /* NIC reset errors */
51  int   nic_reset_count;      /* The number of times uti596reset() has been called. */
52};
53
54#define CMD_EOL                                         0x8000          /* The last command of the list, stop. */
55#define CMD_SUSP                                        0x4000          /* Suspend after doing cmd.                                      */
56#define CMD_INTR                                        0x2000          /* Interrupt after doing cmd.                            */
57
[df49c60]58#define CMD_FLEX                                        0x0008          /* Enable flexible memory model   */
[5a23ca84]59
60#define SCB_STAT_CX             0x8000          /* Cmd completes with 'I' bit set */
61#define SCB_STAT_FR             0x4000          /* Frame Received                 */
62#define SCB_STAT_CNA            0x2000          /* Cmd unit Not Active            */
63#define SCB_STAT_RNR            0x1000          /* Receiver Not Ready             */
64
65#define SCB_CUS_SUSPENDED 0x0100
66#define SCB_CUS_ACTIVE    0x0200
67
68#define STAT_C                                          0x8000          /* Set to 1 after execution              */
69#define STAT_B                                          0x4000          /* 1 : Cmd being executed, 0 : Cmd done. */
70#define STAT_OK                                         0x2000          /* 1: Command executed ok 0 : Error      */
71#define STAT_A                                  0x1000          /* command has been aborted              */
72
73#define STAT_S11                0x0800
74#define STAT_S10                0x0400
75#define STAT_S9                 0x0200
76#define STAT_S8                 0x0100
77#define STAT_S7                 0x0080
78#define STAT_S6                 0x0040
79#define STAT_S5                 0x0020
80#define STAT_MAX_COLLS          0x000F
81
82#define RBD_STAT_P              0x4000          /* prefetch */
83#define RBD_STAT_F              0x4000          /* used */
84
85#define CUC_START                                       0x0100
86#define CUC_RESUME                              0x0200
87#define CUC_SUSPEND             0x0300
88#define CUC_ABORT                                       0x0400
89#define RX_START                                        0x0010
90#define RX_RESUME                                       0x0020
91#define RX_SUSPEND                              0x0030
92#define RX_ABORT                                        0x0040
93
94#define RU_SUSPENDED            0x0010
95#define RU_NO_RESOURCES         0x0020
96#define RU_READY                0x0040
97
98#define I596_NULL ( ( void * ) 0xffffffff)
99#define UTI_596_END_OF_FRAME 0x8000
100
[df49c60]101struct i596_tbd;  /* necessary forward declaration */
[5a23ca84]102
103enum commands {
[6128a4a]104  CmdNOp           = 0,
105  CmdSASetup       = 1,
106  CmdConfigure     = 2,
[5a23ca84]107  CmdMulticastList = 3,
[6128a4a]108  CmdTx            = 4,
109  CmdTDR           = 5,
110  CmdDump          = 6,
[5a23ca84]111  CmdDiagnose      = 7
112};
113
[df49c60]114/*
115 * 82596 Dump Command Result
116 */
117typedef volatile struct i596_dump_result {
118  unsigned char bf;
119  unsigned char config_bytes[11];
120  unsigned char reserved1[2];
121  unsigned char ia_bytes[6];
122  unsigned short last_tx_status;
123  unsigned short tx_crc_byte01;
124  unsigned short tx_crc_byte23;
125  unsigned short rx_crc_byte01;
[6128a4a]126  unsigned short rx_crc_byte23;
[df49c60]127  unsigned short rx_temp_mem01;
128  unsigned short rx_temp_mem23;
129  unsigned short rx_temp_mem45;
130  unsigned short last_rx_status;
131  unsigned short hash_reg01;
132  unsigned short hash_reg23;
133  unsigned short hash_reg45;
134  unsigned short hash_reg67;
135  unsigned short slot_time_counter;
136  unsigned short wait_time_counter;
137  unsigned short rx_frame_length;
138  unsigned long reserved2;
139  unsigned long cb_in3;
140  unsigned long cb_in2;
141  unsigned long cb_in1;
142  unsigned long la_cb_addr;
143  unsigned long rdb_pointer;
144  unsigned long int_memory;
145  unsigned long rfd_size;
146  unsigned long tbd_pointer;
147  unsigned long base_addr;
148  unsigned long ru_temp_reg;
149  unsigned long tcb_count;
150  unsigned long next_rb_size;
151  unsigned long next_rb_addr;
152  unsigned long curr_rb_size;
153  unsigned long la_rbd_addr;
154  unsigned long next_rbd_addr;
155  unsigned long curr_rbd_addr;
156  unsigned long curr_rb_count;
157  unsigned long next_fd_addr;
158  unsigned long curr_fd_add;
159  unsigned long temp_cu_reg;
160  unsigned long next_tb_count;
161  unsigned long buffer_addr;
162  unsigned long la_tbd_addr;
163  unsigned long next_tbd_addr;
164  unsigned long cb_command;
165  unsigned long next_cb_addr;
166  unsigned long curr_cb_addr;
167  unsigned long scb_cmd_word;
168  unsigned long scb_pointer;
169  unsigned long cb_stat_word;
170  unsigned long mm_lfsr;
171  unsigned char micro_machine_bit_array[28];
172  unsigned char cu_port[16];
173  unsigned long mm_alu;
174  unsigned long reserved3;
175  unsigned long mm_temp_a_rr;
176  unsigned long mm_temp_a;
177  unsigned long tx_dma_b_cnt;
178  unsigned long mm_input_port_addr_reg;
179  unsigned long tx_dma_addr;
180  unsigned long mm_port_reg1;
181  unsigned long rx_dma_b_cnt;
182  unsigned long mm_port_reg2;
183  unsigned long rx_dma_addr;
184  unsigned long reserved4;
185  unsigned long bus_t_timers;
186  unsigned long diu_cntrl_reg;
187  unsigned long reserved5;
188  unsigned long sysbus;
189  unsigned long biu_cntrl_reg;
190  unsigned long mm_disp_reg;
191  unsigned long mm_status_reg;
192  unsigned short dump_status;
193} i596_dump_result;
194
195typedef volatile struct i596_selftest {
196  unsigned long rom_signature;
197  unsigned long results;
198} i596_selftest;
199
[6128a4a]200/*
[5a23ca84]201 * Action commands
202 *   (big endian, linear mode)
[6128a4a]203 */
[5a23ca84]204typedef volatile struct i596_cmd {
[df49c60]205  unsigned short status;
206  unsigned short command;
[db9ae70]207  volatile struct i596_cmd *next;
[5a23ca84]208} i596_cmd;
209
210typedef volatile struct i596_nop {
211  i596_cmd cmd;
212} i596_nop;
213
214typedef volatile struct i596_set_add {
215  i596_cmd cmd;
[df49c60]216  char data[8];
[5a23ca84]217} i596_set_add;
218
219typedef volatile struct i596_configure {
220  i596_cmd cmd;
[df49c60]221  char data[16];
[5a23ca84]222} i596_configure;
223
224typedef volatile struct i596_tx {
[df49c60]225  i596_cmd cmd;
[db9ae70]226  volatile struct i596_tbd *pTbd;
[df49c60]227  unsigned short count;
228  unsigned short pad;
229  char data[6];
230  unsigned short length;
[5a23ca84]231} i596_tx;
232
233typedef volatile struct i596_tdr {
234  i596_cmd cmd;
235  unsigned long data;
236} i596_tdr;
237
238typedef volatile struct i596_dump {
239  i596_cmd cmd;
[df49c60]240  char *pData;
[5a23ca84]241} i596_dump;
242
243/*
244 * Transmit buffer descriptor
245 */
246typedef volatile struct i596_tbd {
[df49c60]247          unsigned short size;
248          unsigned short pad;
[db9ae70]249          volatile struct i596_tbd *next;
[6128a4a]250          char *data;
[5a23ca84]251} i596_tbd;
252
253/*
254 * Receive buffer descriptor
255 *   (flexible memory structure)
256 */
257typedef volatile struct i596_rbd {
[df49c60]258          unsigned short count;
259          unsigned short offset;
[db9ae70]260          volatile struct i596_rbd *next;
[6128a4a]261          char *data;
[df49c60]262          unsigned short size;
263          unsigned short pad;
[5a23ca84]264} i596_rbd;
265
266/*
267 * Receive Frame Descriptor
268 */
269typedef volatile struct i596_rfd {
[df49c60]270          unsigned short stat;
271          unsigned short cmd;
[db9ae70]272          volatile struct i596_rfd *next;
[6128a4a]273          i596_rbd *pRbd;
[df49c60]274          unsigned short count;
275          unsigned short size;
[6128a4a]276          char data [1532];
[5a23ca84]277} i596_rfd;
278
279/*
280 * System Control Block
281 */
282typedef volatile struct i596_scb {
[df49c60]283          unsigned short status;
284          unsigned short command;
285          unsigned long cmd_pointer;
286          unsigned long rfd_pointer;
287          unsigned long crc_err;
288          unsigned long align_err;
289          unsigned long resource_err;
290          unsigned long over_err;
291          unsigned long rcvdt_err;
292          unsigned long short_err;
293          unsigned short t_off;
294          unsigned short t_on;
295          i596_cmd *pCmd;
296          i596_rfd *pRfd;
[5a23ca84]297} i596_scb;
298
[6128a4a]299/*
[5a23ca84]300 * Intermediate System Configuration Pointer
301 */
302typedef volatile struct i596_iscp {
[2a7e204]303    uint8_t   null1;                                    /* Always zero */
304    uint8_t   busy;                                                                             /* Busy byte */
[df49c60]305    unsigned short scb_offset;                          /* Not used in linear mode */
306    unsigned long scb_pointer;          /* Swapped pointer to scb */
307    i596_scb *scb;                                                                              /* Real pointer to scb */
[5a23ca84]308} i596_iscp;
309
310/*
311 * System Configuration Pointer
312 */
313typedef volatile struct i596_scp {
[df49c60]314    unsigned long sysbus;                                                       /* Only low 8 bits are used */
315    unsigned long pad;                                                          /* Must be zero */
316    unsigned long iscp_pointer;       /* Swapped pointer to iscp */
317    i596_iscp *iscp;                                                                    /* Real pointer to iscp */
[5a23ca84]318} i596_scp;
319
[df49c60]320/*
321 * Device Dependent Data Structure
322 */
[5a23ca84]323typedef volatile struct uti596_softc {
[df49c60]324  struct arpcom arpcom;
325  i596_scp *pScp;                                                                                       /* Block aligned on 16 byte boundary */
326  i596_scp *base_scp;                 /* Unaligned block. Need for free() */
327  i596_iscp iscp;
328  i596_scb scb;
329  i596_set_add set_add;
330  i596_configure set_conf;
331  i596_tdr tdr;
[6128a4a]332  i596_nop nop;
[df49c60]333  i596_tx  *pTxCmd;
334  i596_tbd *pTbd;
335
336  i596_rfd *pBeginRFA;
337  i596_rfd *pEndRFA;
338  i596_rfd *pLastUnkRFD;
339  i596_rbd *pLastUnkRBD;
340  i596_rfd *pEndSavedQueue;
341  i596_cmd *pCmdHead;
342  i596_cmd *pCmdTail;                           /* unneeded, as chaining not used, but implemented */
343
344  rtems_id rxDaemonTid;
345  rtems_id txDaemonTid;
346  rtems_id resetDaemonTid;
[5a23ca84]347
348  struct enet_statistics stats;
[df49c60]349  int started;
350  unsigned long rxInterrupts;
351  unsigned long txInterrupts;
352  volatile int cmdOk;
353  unsigned short * pCurrent_command_status;
354  int resetDone;
355  unsigned long txRawWait;
356  i596_rfd *pInboundFrameQueue;
357  short int rxBdCount;
358  short int txBdCount;
359  short int countRFD;
360  short int savedCount;
361  i596_rfd *pSavedRfdQueue;
362  rtems_name semaphore_name;
363  rtems_id semaphore_id;
364  char zeroes[64];
365  unsigned long rawsndcnt;
366  int nic_reset;  /* flag for requesting that ISR issue a reset quest */
[5a23ca84]367} uti596_softc_;
368
369#endif /* UTI596_H */
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