source: rtems/bsps/m68k/mvme167/clock/ckinit.c @ bb99cd0d

5
Last change on this file since bb99cd0d was bb99cd0d, checked in by Sebastian Huber <sebastian.huber@…>, on Dec 5, 2019 at 6:22:33 PM

clock: Simplify driver initialization

Use a system initialization handler instead of a legacy IO driver.

Update #3834.

  • Property mode set to 100644
File size: 5.2 KB
Line 
1/*
2 *  This port does not allow the application to select which timer on the
3 *  MVME167 to use for the clock, nor does it allow the application to
4 *  configure the clock. The clock uses the VMEchip2 Tick Timer #2. This
5 *  timer is set up to raise a MC680x0 level-6 interrupt every 1 ms. The
6 *  interrupt vector is 0x69.
7 *
8 *  All page references are to the MVME166/MVME167/MVME187 Single Board
9 *  Computer Programmer's Reference Guide (MVME187PG/D2) with the April
10 *  1993 supplements/addenda (MVME187PG/D2A1).
11 */
12
13/*
14 *  COPYRIGHT (c) 1989-1999.
15 *  On-Line Applications Research Corporation (OAR).
16 *
17 *  The license and distribution terms for this file may be
18 *  found in the file LICENSE in this distribution or at
19 *  http://www.rtems.org/license/LICENSE.
20 *
21 *  Modifications of respective RTEMS files:
22 *  Copyright (c) 1998, National Research Council of Canada
23 */
24
25#include <stdlib.h>
26#include <bsp.h>
27#include <rtems/clockdrv.h>
28
29#define MS_COUNT          1000              /* T2's countdown constant (1 ms) */
30#define CLOCK_INT_LEVEL   6                 /* T2's interrupt level */
31#define CLOCK_VECTOR (VBR0 * 0x10 + 0x9)    /* T2 is vector $X9 (p. 2-71)*/
32
33/*
34 *  Clock_driver_ticks is a monotonically increasing counter of the number of
35 *  VMEchip2 timer #2 ticks since the driver was initialized.
36 */
37volatile uint32_t Clock_driver_ticks;
38
39/*
40 *  Clock_isrs is the number of clock ISRs until the next invocation of the
41 *  RTEMS clock tick routine. This clock tick device driver gets an interrupt
42 *  once a millisecond and counts down until the length of time between the
43 *  user configured microseconds per tick has passed. This allows the clock
44 *  device to "tick" faster than the kernel clock. Of course, the kernel clock
45 *  cannot tick faster than the hardware clock. Therefore, the kernel clock
46 *  ticks cannot occur more frequently than every 1 millisecond.
47 */
48uint32_t         Clock_isrs;
49
50/*
51 *  Records the previous clock ISR (should be NULL)
52 */
53rtems_isr_entry  Old_ticker;
54
55/*
56 *  Called when the kernel exits.
57 */
58void clock_exit( void );
59
60/*
61 *  VMEchip2_T2_isr
62 *
63 *  C ISR Handler. Increment the number of internal ticks. If it is time for a
64 *  kernel clock tick (if Clock_isrs == 1), call rtems_clock_tick() to signal
65 *  the event and reset the Clock_isrs counter; else, just decrement it.
66 */
67static rtems_isr VMEchip2_T2_isr(
68  rtems_vector_number vector
69)
70{
71  char overflow;                /* Content of overflow counter */
72  long i;
73  long ct;                      /* Number of T2 ticks per RTEMS ticks */
74
75  ct = rtems_configuration_get_microseconds_per_tick() / 1000;
76
77  /*
78   *  May have missed interrupts, so should look at the overflow counter.
79   */
80  lcsr->intr_clear |= 0x02000000;   /* Clear the interrupt */
81  overflow = (lcsr->board_ctl >> 12) & 0xF;
82  lcsr->board_ctl |= 0x400;         /* Reset overflow counter */
83
84  /* Attempt to protect against one more period */
85  if ( overflow == 0 )
86    overflow = 16;
87
88  Clock_driver_ticks += overflow;   /* One or more internal ticks */
89
90  if ( Clock_isrs <= overflow ) {
91    /* If its time for kernel clock ticks, signal the events to RTEMS */
92    for( i = overflow - Clock_isrs; i >= 0; i -= ct ) {
93      rtems_clock_tick();
94    }
95    /* Reset the counter */
96    Clock_isrs = (uint32_t)-i;
97  }
98  else
99    Clock_isrs -= overflow;
100}
101
102/*
103 *  VMEchip2_T2_initialize
104 *
105 *  Initialize the VMEchip2 Tick Timer #2.
106 *
107 *  THE VMECHIP2 PRESCALER REGISTER IS ASSUMED TO BE SET!
108 *  The prescaler is used by all VMEchip2 timers, including the VMEbus grant
109 *  timeout counter, the DMAC time off timer, the DMAC timer on timer, and the
110 *  VMEbus global timeout timer. The prescaler value is normally set by the
111 *  boot ROM to provide a 1 MHz clock to the timers. For a 25 MHz MVME167, the
112 *  prescaler value should be 0xE7 (page 2-63).
113 */
114static void VMEchip2_T2_initialize( void )
115{
116  Clock_driver_ticks = 0;
117  Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
118
119  lcsr->intr_ena &= 0xFDFFFFFF;   /* Disable tick timer 2 interrupt */
120  lcsr->intr_clear = 0x02000000;  /* Clear tick timer 2 interrupt */
121  lcsr->intr_level[0] =           /* Set tick timer 2 interrupt level */
122      (lcsr->intr_level[0] & 0xFFFFFF0F ) | (CLOCK_INT_LEVEL << 4);
123  lcsr->timer_cmp_2 = MS_COUNT;   /* Period in compare register */
124  lcsr->timer_cnt_2 = 0;          /* Clear tick timer 2 counter */
125  Old_ticker =                    /* Install C ISR */
126      (rtems_isr_entry) set_vector( VMEchip2_T2_isr, CLOCK_VECTOR, 1 );
127  lcsr->board_ctl |= 0x700;       /* Start tick timer 2, reset-on-compare, */
128                                  /*  and clear tick timer 2 overflow counter */
129  lcsr->intr_ena |= 0x02000000;   /* Enable tick timer 2 interrupt */
130  lcsr->vector_base |= 0x00800000;/* Unmask VMEchip2 interrupts */
131  atexit( clock_exit );           /* Turn off T2 interrupts when we exit */
132}
133
134/*
135 *  This routine stops the VMEchip2 T2 timer, disables its interrupt, and
136 *  re-install the old interrupt vectors.
137 */
138void clock_exit( void )
139{
140  lcsr->board_ctl &= 0xFFFFFEFF;  /* Stop tick timer 2 */
141  lcsr->intr_ena &= 0xFDFFFFFF;   /* Disable tick timer 2 interrupt */
142  lcsr->intr_clear = 0x02000000;  /* Clear tick timer 2 interrupt */
143
144  set_vector( Old_ticker, CLOCK_VECTOR, 1 );
145}
146
147void _Clock_Initialize( void )
148{
149  VMEchip2_T2_initialize();
150}
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