source: rtems/bsps/m68k/mvme147/btimer/timerisr.S @ b82a4b4

5
Last change on this file since b82a4b4 was e0dd8a5a, checked in by Sebastian Huber <sebastian.huber@…>, on 04/20/18 at 10:08:42

bsps: Move benchmark timer to bsps

This patch is a part of the BSP source reorganization.

Update #3285.
  • Property mode set to 100644
File size: 605 bytes
Line 
1/*  timer_isr()
2 *
3 *  This routine provides the ISR for the PCC timer on the MVME147
4 *  board.   The timer is set up to generate an interrupt at maximum
5 *  intervals.
6 *
7 *  MVME147 port for TNI - Telecom Bretagne
8 *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
9 *  May 1996
10 */
11
12#include <rtems/asm.h>
13
14BEGIN_CODE
15
16.set T1_CONTROL_REGISTER,  0xfffe1018    | timer 1 control register
17
18        PUBLIC (timerisr)
19SYM (timerisr):
20        orb     #0x80, T1_CONTROL_REGISTER | clear T1 int status bit
21        addql   #1, SYM (Ttimer_val)     | increment timer value
22end_timerisr:
23        rte
24
25END_CODE
26END
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