1 | /* |
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2 | * File: MCD_dma.h |
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3 | * Purpose: Main header file for multi-channel DMA API. |
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4 | * |
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5 | * Notes: |
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6 | */ |
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7 | #ifndef _MCD_API_H |
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8 | #define _MCD_API_H |
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9 | |
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10 | /* |
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11 | * Turn Execution Unit tasks ON (#define) or OFF (#undef) |
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12 | */ |
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13 | #define MCD_INCLUDE_EU |
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14 | |
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15 | /* |
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16 | * Number of DMA channels |
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17 | */ |
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18 | #define NCHANNELS 16 |
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19 | |
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20 | /* |
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21 | * Total number of variants |
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22 | */ |
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23 | #ifdef MCD_INCLUDE_EU |
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24 | #define NUMOFVARIANTS 6 |
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25 | #else |
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26 | #define NUMOFVARIANTS 4 |
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27 | #endif |
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28 | |
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29 | /* |
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30 | * Define sizes of the various tables |
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31 | */ |
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32 | #define TASK_TABLE_SIZE (NCHANNELS*32) |
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33 | #define VAR_TAB_SIZE (128) |
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34 | #define CONTEXT_SAVE_SIZE (128) |
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35 | #define FUNCDESC_TAB_SIZE (256) |
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36 | |
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37 | #ifdef MCD_INCLUDE_EU |
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38 | #define FUNCDESC_TAB_NUM 16 |
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39 | #else |
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40 | #define FUNCDESC_TAB_NUM 1 |
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41 | #endif |
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42 | |
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43 | |
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44 | #ifndef DEFINESONLY |
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45 | |
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46 | /* |
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47 | * Portability typedefs |
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48 | */ |
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49 | typedef int s32; |
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50 | typedef unsigned int u32; |
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51 | typedef short s16; |
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52 | typedef unsigned short u16; |
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53 | typedef char s8; |
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54 | typedef unsigned char u8; |
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55 | |
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56 | /* |
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57 | * These structures represent the internal registers of the |
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58 | * multi-channel DMA |
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59 | */ |
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60 | struct dmaRegs_s { |
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61 | u32 taskbar; /* task table base address register */ |
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62 | u32 currPtr; |
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63 | u32 endPtr; |
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64 | u32 varTablePtr; |
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65 | u16 dma_rsvd0; |
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66 | u16 ptdControl; /* ptd control */ |
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67 | u32 intPending; /* interrupt pending register */ |
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68 | u32 intMask; /* interrupt mask register */ |
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69 | u16 taskControl[16]; /* task control registers */ |
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70 | u8 priority[32]; /* priority registers */ |
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71 | u32 initiatorMux; /* initiator mux control */ |
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72 | u32 taskSize0; /* task size control register 0. */ |
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73 | u32 taskSize1; /* task size control register 1. */ |
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74 | u32 dma_rsvd1; /* reserved */ |
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75 | u32 dma_rsvd2; /* reserved */ |
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76 | u32 debugComp1; /* debug comparator 1 */ |
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77 | u32 debugComp2; /* debug comparator 2 */ |
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78 | u32 debugControl; /* debug control */ |
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79 | u32 debugStatus; /* debug status */ |
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80 | u32 ptdDebug; /* priority task decode debug */ |
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81 | u32 dma_rsvd3[31]; /* reserved */ |
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82 | }; |
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83 | typedef volatile struct dmaRegs_s dmaRegs; |
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84 | |
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85 | #endif |
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86 | |
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87 | /* |
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88 | * PTD contrl reg bits |
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89 | */ |
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90 | #define PTD_CTL_TSK_PRI 0x8000 |
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91 | #define PTD_CTL_COMM_PREFETCH 0x0001 |
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92 | |
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93 | /* |
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94 | * Task Control reg bits and field masks |
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95 | */ |
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96 | #define TASK_CTL_EN 0x8000 |
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97 | #define TASK_CTL_VALID 0x4000 |
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98 | #define TASK_CTL_ALWAYS 0x2000 |
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99 | #define TASK_CTL_INIT_MASK 0x1f00 |
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100 | #define TASK_CTL_ASTRT 0x0080 |
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101 | #define TASK_CTL_HIPRITSKEN 0x0040 |
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102 | #define TASK_CTL_HLDINITNUM 0x0020 |
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103 | #define TASK_CTL_ASTSKNUM_MASK 0x000f |
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104 | |
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105 | /* |
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106 | * Priority reg bits and field masks |
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107 | */ |
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108 | #define PRIORITY_HLD 0x80 |
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109 | #define PRIORITY_PRI_MASK 0x07 |
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110 | |
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111 | /* |
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112 | * Debug Control reg bits and field masks |
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113 | */ |
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114 | #define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000 |
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115 | #define DBG_CTL_AUTO_ARM 0x00008000 |
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116 | #define DBG_CTL_BREAK 0x00004000 |
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117 | #define DBG_CTL_COMP1_TYP_MASK 0x00003800 |
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118 | #define DBG_CTL_COMP2_TYP_MASK 0x00000070 |
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119 | #define DBG_CTL_EXT_BREAK 0x00000004 |
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120 | #define DBG_CTL_INT_BREAK 0x00000002 |
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121 | |
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122 | /* |
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123 | * PTD Debug reg selector addresses |
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124 | * This reg must be written with a value to show the contents of |
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125 | * one of the desired internal register. |
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126 | */ |
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127 | #define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */ |
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128 | #define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and |
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129 | have initiators asserted */ |
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130 | |
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131 | |
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132 | /* |
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133 | * General return values |
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134 | */ |
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135 | #define MCD_OK 0 |
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136 | #define MCD_ERROR -1 |
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137 | #define MCD_TABLE_UNALIGNED -2 |
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138 | #define MCD_CHANNEL_INVALID -3 |
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139 | |
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140 | /* |
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141 | * MCD_initDma input flags |
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142 | */ |
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143 | #define MCD_RELOC_TASKS 0x00000001 |
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144 | #define MCD_NO_RELOC_TASKS 0x00000000 |
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145 | #define MCD_COMM_PREFETCH_EN 0x00000002 /* Commbus Prefetching - MCF547x/548x ONLY */ |
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146 | |
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147 | /* |
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148 | * MCD_dmaStatus Status Values for each channel |
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149 | */ |
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150 | #define MCD_NO_DMA 1 /* No DMA has been requested since reset */ |
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151 | #define MCD_IDLE 2 /* DMA active, but the initiator is currently inactive */ |
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152 | #define MCD_RUNNING 3 /* DMA active, and the initiator is currently active */ |
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153 | #define MCD_PAUSED 4 /* DMA active but it is currently paused */ |
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154 | #define MCD_HALTED 5 /* the most recent DMA has been killed with MCD_killTask() */ |
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155 | #define MCD_DONE 6 /* the most recent DMA has completed. */ |
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156 | |
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157 | |
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158 | /* |
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159 | * MCD_startDma parameter defines |
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160 | */ |
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161 | |
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162 | /* |
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163 | * Constants for the funcDesc parameter |
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164 | */ |
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165 | /* Byte swapping: */ |
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166 | #define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */ |
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167 | #define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */ |
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168 | #define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of |
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169 | each 32-bit data value being DMAed.*/ |
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170 | #define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each |
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171 | 16-bit half of each 32-bit data value DMAed */ |
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172 | #define MCD_NO_BIT_REV 0x00000000 /* do not reverse the bits of each byte DMAed. */ |
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173 | #define MCD_BIT_REV 0x00088880 /* reverse the bits of each byte DMAed */ |
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174 | /* CRCing: */ |
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175 | #define MCD_CRC16 0xc0100000 /* to perform CRC-16 on DMAed data. */ |
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176 | #define MCD_CRCCCITT 0xc0200000 /* to perform CRC-CCITT on DMAed data. */ |
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177 | #define MCD_CRC32 0xc0300000 /* to perform CRC-32 on DMAed data. */ |
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178 | #define MCD_CSUMINET 0xc0400000 /* to perform internet checksums on DMAed data.*/ |
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179 | #define MCD_NO_CSUM 0xa0000000 /* to perform no checksumming. */ |
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180 | |
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181 | #define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM) |
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182 | #define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM) |
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183 | |
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184 | /* |
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185 | * Constants for the flags parameter |
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186 | */ |
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187 | #define MCD_TT_FLAGS_RL 0x00000001 /* Read line */ |
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188 | #define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */ |
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189 | #define MCD_TT_FLAGS_SP 0x00000004 /* Speculative prefetch(XLB) MCF547x/548x ONLY */ |
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190 | #define MCD_TT_FLAGS_MASK 0x000000ff |
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191 | #define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW) |
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192 | |
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193 | #define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */ |
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194 | #define MCD_CHAIN_DMA /* TBD */ |
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195 | #define MCD_EU_DMA /* TBD */ |
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196 | #define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */ |
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197 | #define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */ |
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198 | |
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199 | |
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200 | /* these flags are valid for MCD_startDma and the chained buffer descriptors */ |
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201 | #define MCD_BUF_READY 0x80000000 /* indicates that this buffer is now under the DMA's control */ |
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202 | #define MCD_WRAP 0x20000000 /* to tell the FEC Dmas to wrap to the first BD */ |
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203 | #define MCD_INTERRUPT 0x10000000 /* to generate an interrupt after completion of the DMA. */ |
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204 | #define MCD_END_FRAME 0x08000000 /* tell the DMA to end the frame when transferring |
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205 | last byte of data in buffer */ |
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206 | #define MCD_CRC_RESTART 0x40000000 /* to empty out the accumulated checksum |
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207 | prior to performing the DMA. */ |
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208 | |
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209 | /* Defines for the FEC buffer descriptor control/status word*/ |
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210 | #define MCD_FEC_BUF_READY 0x8000 |
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211 | #define MCD_FEC_WRAP 0x2000 |
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212 | #define MCD_FEC_INTERRUPT 0x1000 |
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213 | #define MCD_FEC_END_FRAME 0x0800 |
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214 | |
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215 | |
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216 | /* |
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217 | * Defines for general intuitiveness |
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218 | */ |
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219 | |
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220 | #define MCD_TRUE 1 |
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221 | #define MCD_FALSE 0 |
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222 | |
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223 | /* |
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224 | * Three different cases for destination and source. |
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225 | */ |
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226 | #define MINUS1 -1 |
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227 | #define ZERO 0 |
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228 | #define PLUS1 1 |
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229 | |
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230 | #ifndef DEFINESONLY |
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231 | |
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232 | /* Task Table Entry struct*/ |
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233 | typedef struct { |
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234 | u32 TDTstart; /* task descriptor table start */ |
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235 | u32 TDTend; /* task descriptor table end */ |
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236 | u32 varTab; /* variable table start */ |
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237 | u32 FDTandFlags; /* function descriptor table start and flags */ |
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238 | volatile u32 descAddrAndStatus; |
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239 | volatile u32 modifiedVarTab; |
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240 | u32 contextSaveSpace; /* context save space start */ |
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241 | u32 literalBases; |
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242 | } TaskTableEntry; |
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243 | |
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244 | |
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245 | /* Chained buffer descriptor */ |
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246 | typedef volatile struct MCD_bufDesc_struct MCD_bufDesc; |
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247 | struct MCD_bufDesc_struct { |
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248 | u32 flags; /* flags describing the DMA */ |
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249 | u32 csumResult; /* checksum from checksumming performed since last checksum reset */ |
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250 | s8 *srcAddr; /* the address to move data from */ |
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251 | s8 *destAddr; /* the address to move data to */ |
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252 | s8 *lastDestAddr; /* the last address written to */ |
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253 | u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */ |
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254 | MCD_bufDesc *next; /* next buffer descriptor in chain */ |
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255 | u32 info; /* private information about this descriptor; DMA does not affect it */ |
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256 | }; |
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257 | |
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258 | /* Progress Query struct */ |
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259 | typedef volatile struct MCD_XferProg_struct { |
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260 | s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */ |
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261 | s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */ |
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262 | u32 dmaSize; /* the amount of data transferred for the current buffer */ |
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263 | MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */ |
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264 | } MCD_XferProg; |
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265 | |
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266 | |
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267 | /* FEC buffer descriptor */ |
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268 | typedef volatile struct MCD_bufDescFec_struct { |
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269 | u16 statCtrl; |
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270 | u16 length; |
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271 | u32 dataPointer; |
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272 | } MCD_bufDescFec; |
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273 | |
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274 | |
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275 | /*************************************************************************/ |
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276 | /* |
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277 | * API function Prototypes - see MCD_dmaApi.c for further notes |
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278 | */ |
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279 | |
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280 | /* |
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281 | * MCD_startDma starts a particular kind of DMA . |
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282 | */ |
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283 | int MCD_startDma ( |
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284 | int channel, /* the channel on which to run the DMA */ |
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285 | s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */ |
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286 | s16 srcIncr, /* the amount to increment the source address per transfer */ |
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287 | s8 *destAddr, /* the address to move data to */ |
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288 | s16 destIncr, /* the amount to increment the destination address per transfer */ |
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289 | u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */ |
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290 | u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ |
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291 | u32 initiator, /* what device initiates the DMA */ |
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292 | int priority, /* priority of the DMA */ |
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293 | u32 flags, /* flags describing the DMA */ |
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294 | u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ |
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295 | ); |
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296 | |
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297 | /* |
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298 | * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA |
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299 | * registers, relocating and creating the appropriate task structures, and |
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300 | * setting up some global settings |
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301 | */ |
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302 | int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags); |
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303 | |
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304 | /* |
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305 | * MCD_dmaStatus() returns the status of the DMA on the requested channel. |
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306 | */ |
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307 | int MCD_dmaStatus (int channel); |
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308 | |
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309 | /* |
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310 | * MCD_XferProgrQuery() returns progress of DMA on requested channel |
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311 | */ |
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312 | int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep); |
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313 | |
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314 | /* |
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315 | * MCD_killDma() halts the DMA on the requested channel, without any |
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316 | * intention of resuming the DMA. |
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317 | */ |
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318 | int MCD_killDma (int channel); |
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319 | |
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320 | /* |
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321 | * MCD_continDma() continues a DMA which as stopped due to encountering an |
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322 | * unready buffer descriptor. |
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323 | */ |
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324 | int MCD_continDma (int channel); |
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325 | |
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326 | /* |
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327 | * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is |
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328 | * running on that channel). |
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329 | */ |
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330 | int MCD_pauseDma (int channel); |
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331 | |
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332 | /* |
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333 | * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is |
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334 | * running on that channel). |
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335 | */ |
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336 | int MCD_resumeDma (int channel); |
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337 | |
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338 | /* |
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339 | * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA |
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340 | */ |
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341 | int MCD_csumQuery (int channel, u32 *csum); |
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342 | |
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343 | /* |
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344 | * MCD_getCodeSize provides the packed size required by the microcoded task |
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345 | * and structures. |
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346 | */ |
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347 | int MCD_getCodeSize(void); |
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348 | |
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349 | /* |
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350 | * MCD_getVersion provides a pointer to a version string and returns a |
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351 | * version number. |
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352 | */ |
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353 | int MCD_getVersion(char **longVersion); |
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354 | |
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355 | /* macro for setting a location in the variable table */ |
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356 | #define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value |
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357 | /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function, |
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358 | so I'm avoiding surrounding it with "do {} while(0)" */ |
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359 | |
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360 | #endif /* DEFINESONLY */ |
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361 | |
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362 | #endif /* _MCD_API_H */ |
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