1 | /*===============================================================*\ |
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2 | | Project: RTEMS generic mcf548x BSP | |
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3 | +-----------------------------------------------------------------+ |
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4 | | File: linkcmd.m5484FireEngine.flash | |
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5 | +-----------------------------------------------------------------+ |
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6 | | The file contains the linker directives for the generic MCF548x | |
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7 | | BSP to be used with an m5484FireEngine EVB to load and execute | |
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8 | | code in the boot FLASH. | |
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9 | +-----------------------------------------------------------------+ |
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10 | | Copyright (c) 2007 | |
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11 | | Embedded Brains GmbH | |
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12 | | Obere Lagerstr. 30 | |
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13 | | D-82178 Puchheim | |
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14 | | Germany | |
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15 | | rtems@embedded-brains.de | |
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16 | +-----------------------------------------------------------------+ |
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17 | | | |
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18 | | Parts of the code has been derived from the "dBUG source code" | |
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19 | | package Freescale is providing for M548X EVBs. The usage of | |
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20 | | the modified or unmodified code and it's integration into the | |
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21 | | generic mcf548x BSP has been done according to the Freescale | |
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22 | | license terms. | |
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23 | | | |
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24 | | The Freescale license terms can be reviewed in the file | |
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25 | | | |
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26 | | Freescale_license.txt | |
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27 | | | |
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28 | +-----------------------------------------------------------------+ |
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29 | | | |
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30 | | The generic mcf548x BSP has been developed on the basic | |
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31 | | structures and modules of the av5282 BSP. | |
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32 | | | |
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33 | +-----------------------------------------------------------------+ |
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34 | | | |
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35 | | The license and distribution terms for this file may be | |
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36 | | found in the file LICENSE in this distribution or at | |
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37 | | | |
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38 | | http://www.rtems.org/license/LICENSE. | |
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39 | | | |
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40 | +-----------------------------------------------------------------+ |
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41 | | | |
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42 | | date history ID | |
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43 | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
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44 | | 12.11.07 1.0 ras | |
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45 | | | |
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46 | \*===============================================================*/ |
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47 | |
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48 | /* |
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49 | * Location and size of on-chip devices |
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50 | */ |
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51 | _SdramBase = DEFINED(_SdramBase) ? _SdramBase : 0x00000000; |
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52 | _SdramSize = DEFINED(_SdramSize) ? _SdramSize : (64 * 1024 * 1024); |
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53 | _SysSramBase = DEFINED(_SysSramBase) ? _SysSramBase : __MBAR + 0x00010000; |
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54 | _SysSramSize = DEFINED(_SysSramSize) ? _SysSramSize : (32 * 1024); |
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55 | _McdapiBase = DEFINED(_McdapiBase) ? _McdapiBase : _SysSramBase; |
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56 | _McdapiSize = DEFINED(_McdapiSize) ? _McdapiSize : (12 * 1024); |
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57 | _CoreSramBase0 = DEFINED(_CoreSramBase0) ? _CoreSramBase0 : 0x20000000; |
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58 | _CoreSramBase1 = DEFINED(_CoreSramBase1) ? _CoreSramBase1 : 0x20001000; |
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59 | _CoreSramSize0 = DEFINED(_CoreSramSize0) ? _CoreSramSize0 : (4 * 1024); |
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60 | _CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024); |
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61 | _BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFF800000; |
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62 | _BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024 * 1024); |
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63 | _CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000; |
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64 | _CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024 * 1024); |
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65 | |
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66 | bsp_initstack_size = DEFINED(StackSize) ? StackSize : 0x800; /* 2 kB */ |
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67 | |
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68 | _VBR = DEFINED(_VBR) ? _VBR : _SdramBase; |
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69 | |
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70 | __MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000; |
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71 | |
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72 | MEMORY |
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73 | { |
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74 | sdram : ORIGIN = 0x00000000, LENGTH = 64M |
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75 | code_flash : ORIGIN = 0xE0000000, LENGTH = 16M |
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76 | boot_flash : ORIGIN = 0xFF800000, LENGTH = 2M |
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77 | } |
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78 | |
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79 | REGION_ALIAS ("REGION_TEXT", boot_flash); |
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80 | REGION_ALIAS ("REGION_TEXT_LOAD", boot_flash); |
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81 | REGION_ALIAS ("REGION_DATA", sdram); |
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82 | REGION_ALIAS ("REGION_DATA_LOAD", boot_flash); |
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83 | |
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84 | INCLUDE linkcmds.base |
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