1 | /*===============================================================*\ |
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2 | | Project: RTEMS generic MCF548x BSP | |
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3 | +-----------------------------------------------------------------+ |
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4 | | Copyright (c) 2004-2009 | |
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5 | | Embedded Brains GmbH | |
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6 | | Obere Lagerstr. 30 | |
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7 | | D-82178 Puchheim | |
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8 | | Germany | |
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9 | | rtems@embedded-brains.de | |
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10 | +-----------------------------------------------------------------+ |
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11 | | The license and distribution terms for this file may be | |
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12 | | found in the file LICENSE in this distribution or at | |
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13 | | | |
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14 | | http://www.rtems.org/license/LICENSE. | |
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15 | | | |
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16 | +-----------------------------------------------------------------+ |
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17 | | this file contains glue functions to the Freescale MC_DMA API | |
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18 | \*===============================================================*/ |
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19 | #include <rtems.h> |
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20 | #include <rtems/error.h> |
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21 | #include <bsp.h> |
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22 | #include <mcf548x/mcf548x.h> |
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23 | #include <mcf548x/MCD_dma.h> |
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24 | #include <mcf548x/mcdma_glue.h> |
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25 | |
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26 | #define MCDMA_INT_ENABLE(reg,chan) (reg &= ~(1 << (chan))) |
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27 | #define MCDMA_INT_DISABLE(reg,chan) (reg |= (1 << (chan))) |
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28 | #define MCDMA_CLEAR_IEVENT(reg,chan) (reg = (1 << (chan))) |
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29 | |
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30 | #define MCDMA_INT_BIT_IMPL 0x0000FFFF /* implemented IRQ sources (bitmask for IPEND... */ |
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31 | #define MCDMA_IRQ_VECTOR (48+64) |
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32 | #define MCDMA_IRQ_LEVEL (2) |
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33 | #define MCDMA_IRQ_PRIORITY (2) |
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34 | /*=========================================================================*\ |
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35 | | Function: | |
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36 | \*-------------------------------------------------------------------------*/ |
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37 | void mcdma_glue_irq_enable |
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38 | ( |
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39 | /*-------------------------------------------------------------------------*\ |
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40 | | Purpose: | |
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41 | | enable interrupt for given task number | |
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42 | +---------------------------------------------------------------------------+ |
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43 | | Input Parameters: | |
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44 | \*-------------------------------------------------------------------------*/ |
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45 | int mcdma_channo /* task number to enable */ |
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46 | ) |
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47 | /*-------------------------------------------------------------------------*\ |
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48 | | Return Value: | |
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49 | | none | |
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50 | \*=========================================================================*/ |
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51 | { |
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52 | rtems_interrupt_level level; |
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53 | if (0 != ((1UL<<mcdma_channo) & MCDMA_INT_BIT_IMPL)) { |
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54 | rtems_interrupt_disable(level); |
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55 | /* |
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56 | * valid task number |
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57 | * enable interrupt in mcdma mask |
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58 | */ |
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59 | MCDMA_INT_ENABLE(MCF548X_DMA_DIMR,mcdma_channo); |
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60 | rtems_interrupt_enable(level); |
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61 | } |
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62 | } |
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63 | |
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64 | /*=========================================================================*\ |
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65 | | Function: | |
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66 | \*-------------------------------------------------------------------------*/ |
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67 | void mcdma_glue_irq_disable |
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68 | ( |
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69 | /*-------------------------------------------------------------------------*\ |
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70 | | Purpose: | |
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71 | | disable interrupt for given task number | |
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72 | +---------------------------------------------------------------------------+ |
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73 | | Input Parameters: | |
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74 | \*-------------------------------------------------------------------------*/ |
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75 | int mcdma_channo /* task number to disable */ |
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76 | ) |
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77 | /*-------------------------------------------------------------------------*\ |
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78 | | Return Value: | |
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79 | | none | |
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80 | \*=========================================================================*/ |
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81 | { |
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82 | rtems_interrupt_level level; |
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83 | if (0 != ((1UL<<mcdma_channo) & MCDMA_INT_BIT_IMPL)) { |
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84 | rtems_interrupt_disable(level); |
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85 | /* |
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86 | * valid task number |
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87 | * disable interrupt in mcdma mask |
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88 | */ |
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89 | MCDMA_INT_DISABLE(MCF548X_DMA_DIMR,mcdma_channo); |
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90 | rtems_interrupt_enable(level); |
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91 | } |
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92 | } |
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93 | |
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94 | typedef struct { |
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95 | void (*the_handler)(void *param); |
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96 | void *the_param; |
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97 | } mcdma_glue_irq_handlers_t; |
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98 | |
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99 | mcdma_glue_irq_handlers_t mcdma_glue_irq_handlers[32]; |
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100 | |
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101 | /*=========================================================================*\ |
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102 | | Function: | |
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103 | \*-------------------------------------------------------------------------*/ |
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104 | void mcdma_glue_irq_install |
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105 | ( |
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106 | /*-------------------------------------------------------------------------*\ |
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107 | | Purpose: | |
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108 | | install given function as mcdma interrupt handler | |
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109 | +---------------------------------------------------------------------------+ |
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110 | | Input Parameters: | |
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111 | \*-------------------------------------------------------------------------*/ |
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112 | int mcdma_channo, /* task number for handler */ |
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113 | void (*the_handler)(void *), /* function to call */ |
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114 | void *the_param |
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115 | ) |
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116 | /*-------------------------------------------------------------------------*\ |
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117 | | Return Value: | |
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118 | | none | |
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119 | \*=========================================================================*/ |
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120 | { |
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121 | if (0 != ((1UL<<mcdma_channo) & MCDMA_INT_BIT_IMPL)) { |
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122 | /* |
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123 | * valid task number |
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124 | * install handler |
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125 | */ |
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126 | mcdma_glue_irq_handlers[mcdma_channo].the_handler = the_handler; |
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127 | mcdma_glue_irq_handlers[mcdma_channo].the_param = the_param; |
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128 | } |
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129 | } |
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130 | |
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131 | /*=========================================================================*\ |
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132 | | Function: | |
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133 | \*-------------------------------------------------------------------------*/ |
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134 | static rtems_isr mcdma_glue_irq_dispatcher |
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135 | ( |
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136 | /*-------------------------------------------------------------------------*\ |
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137 | | Purpose: | |
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138 | | general mcdma interrupt handler/dispatcher | |
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139 | +---------------------------------------------------------------------------+ |
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140 | | Input Parameters: | |
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141 | \*-------------------------------------------------------------------------*/ |
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142 | rtems_vector_number v /* irq specific handle (not used) */ |
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143 | |
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144 | ) |
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145 | /*-------------------------------------------------------------------------*\ |
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146 | | Return Value: | |
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147 | | none | |
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148 | \*=========================================================================*/ |
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149 | { |
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150 | uint32_t pending; |
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151 | int curr_channo; |
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152 | |
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153 | pending = MCF548X_DMA_DIPR & ~MCF548X_DMA_DIMR; |
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154 | curr_channo = 0; |
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155 | while (pending != 0) { |
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156 | if ((pending & (1UL<<curr_channo)) != 0) { |
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157 | if (mcdma_glue_irq_handlers[curr_channo].the_handler == NULL) { |
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158 | /* |
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159 | * This should never happen. we have a pending IRQ but no handler |
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160 | * let's clear this pending bit |
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161 | */ |
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162 | MCDMA_CLEAR_IEVENT(MCF548X_DMA_DIPR,curr_channo); |
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163 | } |
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164 | else { |
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165 | /* |
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166 | * call proper handler |
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167 | */ |
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168 | mcdma_glue_irq_handlers[curr_channo].the_handler |
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169 | (mcdma_glue_irq_handlers[curr_channo].the_param); |
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170 | } |
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171 | /* |
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172 | * clear this bit in our pending copy |
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173 | * and go to next bit |
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174 | */ |
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175 | pending &= ~(1<<curr_channo); |
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176 | } |
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177 | curr_channo++; |
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178 | } |
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179 | } |
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180 | |
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181 | static bool mcdma_glue_is_initialized = false; |
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182 | /*=========================================================================*\ |
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183 | | Function: | |
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184 | \*-------------------------------------------------------------------------*/ |
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185 | void mcdma_glue_init |
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186 | ( |
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187 | /*-------------------------------------------------------------------------*\ |
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188 | | Purpose: | |
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189 | | initialize the mcdma module (if not yet done): | |
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190 | | - load code | |
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191 | | - initialize registers | |
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192 | | - initialize bus arbiter | |
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193 | | - initialize interrupt control | |
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194 | +---------------------------------------------------------------------------+ |
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195 | | Input Parameters: | |
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196 | \*-------------------------------------------------------------------------*/ |
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197 | void *sram_base /* base address for SRAM, to be used for DMA task */ |
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198 | ) |
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199 | /*-------------------------------------------------------------------------*\ |
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200 | | Return Value: | |
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201 | | none | |
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202 | \*=========================================================================*/ |
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203 | { |
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204 | rtems_isr_entry old_handler; |
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205 | if (!mcdma_glue_is_initialized) { |
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206 | mcdma_glue_is_initialized = true; |
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207 | |
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208 | MCD_initDma((dmaRegs *)&MCF548X_DMA_TASKBAR, |
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209 | sram_base, |
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210 | MCD_TT_FLAGS_DEF); |
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211 | |
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212 | /* |
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213 | * initialize interrupt dispatcher |
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214 | */ |
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215 | if(rtems_interrupt_catch(mcdma_glue_irq_dispatcher, |
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216 | MCDMA_IRQ_VECTOR, |
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217 | &old_handler)) { |
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218 | rtems_panic ("Can't attach MFC548x MCDma interrupt handler\n"); |
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219 | } |
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220 | MCF548X_INTC_ICRn(MCDMA_IRQ_VECTOR - 64) = |
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221 | MCF548X_INTC_ICRn_IL(MCDMA_IRQ_LEVEL) | |
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222 | MCF548X_INTC_ICRn_IP(MCDMA_IRQ_PRIORITY); |
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223 | |
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224 | MCF548X_INTC_IMRH &= ~(1 << (MCDMA_IRQ_VECTOR % 32)); |
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225 | } |
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226 | } |
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