source: rtems/bsps/m68k/genmcf548x/irq/intc-icr-init-values.c @ 8f8ccee

5
Last change on this file since 8f8ccee was 8f8ccee, checked in by Sebastian Huber <sebastian.huber@…>, on 04/23/18 at 07:50:39

bsps: Move interrupt controller support to bsps

This patch is a part of the BSP source reorganization.

Update #3285.
  • Property mode set to 100644
File size: 786 bytes
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <bsp.h>
16#include <bsp/irq.h>
17
18#define ICR(lvl, prio) (MCF548X_INTC_ICRn_IL(lvl) | MCF548X_INTC_ICRn_IP(prio))
19
20const uint8_t mcf548x_intc_icr_init_values[64] = {
21  [MCF548X_IRQ_SLT0] = ICR(4, 7),
22  [MCF548X_IRQ_SLT1] = ICR(4, 6),
23  [MCF548X_IRQ_PSC0] = ICR(3, 7),
24  [MCF548X_IRQ_PSC1] = ICR(3, 6),
25  [MCF548X_IRQ_PSC2] = ICR(3, 5),
26  [MCF548X_IRQ_PSC3] = ICR(3, 4),
27  [MCF548X_IRQ_FEC0] = ICR(2, 7),
28  [MCF548X_IRQ_FEC1] = ICR(2, 6)
29};
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