1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup RTEMSBSPsM68kGenMCF548X |
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5 | * |
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6 | * @brief Global BSP definitions. |
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7 | */ |
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8 | |
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9 | /*===============================================================*\ |
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10 | | Project: RTEMS generic mcf548x BSP | |
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11 | +-----------------------------------------------------------------+ |
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12 | | File: bsp.h | |
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13 | +-----------------------------------------------------------------+ |
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14 | | The file contains the BSP header of generic MCF548x BSP. | |
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15 | +-----------------------------------------------------------------+ |
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16 | | Copyright (c) 2007 | |
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17 | | Embedded Brains GmbH | |
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18 | | Obere Lagerstr. 30 | |
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19 | | D-82178 Puchheim | |
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20 | | Germany | |
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21 | | rtems@embedded-brains.de | |
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22 | +-----------------------------------------------------------------+ |
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23 | | | |
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24 | | Parts of the code has been derived from the "dBUG source code" | |
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25 | | package Freescale is providing for M548X EVBs. The usage of | |
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26 | | the modified or unmodified code and it's integration into the | |
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27 | | generic mcf548x BSP has been done according to the Freescale | |
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28 | | license terms. | |
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29 | | | |
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30 | | The Freescale license terms can be reviewed in the file | |
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31 | | | |
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32 | | Freescale_license.txt | |
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33 | | | |
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34 | +-----------------------------------------------------------------+ |
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35 | | | |
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36 | | The generic mcf548x BSP has been developed on the basic | |
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37 | | structures and modules of the av5282 BSP. | |
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38 | | | |
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39 | +-----------------------------------------------------------------+ |
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40 | | | |
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41 | | The license and distribution terms for this file may be | |
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42 | | found in the file LICENSE in this distribution or at | |
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43 | | | |
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44 | | http://www.rtems.org/license/LICENSE. | |
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45 | | | |
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46 | +-----------------------------------------------------------------+ |
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47 | | | |
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48 | | date history ID | |
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49 | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
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50 | | 12.11.07 1.0 ras | |
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51 | | | |
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52 | \*===============================================================*/ |
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53 | |
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54 | #ifndef LIBBSP_M68K_GENMCF548X_BSP_H |
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55 | #define LIBBSP_M68K_GENMCF548X_BSP_H |
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56 | |
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57 | #include <bspopts.h> |
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58 | #include <bsp/default-initial-extension.h> |
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59 | |
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60 | /** |
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61 | * @defgroup RTEMSBSPsM68kGenMCF548X MCF548X |
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62 | * |
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63 | * @ingroup RTEMSBSPsM68k |
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64 | * |
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65 | * @brief MCF548X Board Support Package. |
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66 | * |
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67 | * @{ |
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68 | */ |
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69 | |
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70 | #include <rtems.h> |
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71 | #include <rtems/bspIo.h> |
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72 | |
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73 | /***************************************************************************/ |
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74 | /** Hardware data structure headers **/ |
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75 | #include <mcf548x/mcf548x.h> |
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76 | |
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77 | #ifdef __cplusplus |
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78 | extern "C" { |
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79 | #endif |
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80 | |
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81 | /***************************************************************************/ |
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82 | /** User Definable configuration **/ |
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83 | |
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84 | /* define which port the console should use - all other ports are then defined as general purpose */ |
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85 | #define CONSOLE_PORT 0 |
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86 | |
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87 | /* functions */ |
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88 | |
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89 | uint32_t get_CPU_clock_speed(void); |
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90 | |
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91 | rtems_isr_entry set_vector( |
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92 | rtems_isr_entry handler, |
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93 | rtems_vector_number vector, |
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94 | int type |
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95 | ); |
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96 | |
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97 | /* Initial values for the interrupt level and priority registers (INTC_ICRn) */ |
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98 | extern const uint8_t mcf548x_intc_icr_init_values[64]; |
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99 | |
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100 | /* |
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101 | * Network driver configuration |
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102 | */ |
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103 | struct rtems_bsdnet_ifconfig; |
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104 | extern int rtems_mcf548x_fec_driver_attach_detach(struct rtems_bsdnet_ifconfig *config,int attaching); |
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105 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mcf548x_fec_driver_attach_detach |
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106 | |
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107 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "fec1" |
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108 | #define RTEMS_BSP_NETWORK_DRIVER_NAME2 "fec2" |
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109 | |
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110 | #ifdef HAS_DBUG |
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111 | typedef struct { |
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112 | uint32_t console_baudrate; |
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113 | uint8_t server_ip [4]; |
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114 | uint8_t client_ip [4]; |
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115 | uint8_t gateway_ip[4]; |
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116 | uint8_t netmask [4]; |
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117 | uint8_t spare[4]; |
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118 | uint8_t macaddr [6]; |
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119 | uint32_t ethport; /* default fec port: 1 = fec1, 2 = fec2 */ |
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120 | uint32_t uartport; /* default fec port: 1 = psc0, 2 = psc1... */ |
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121 | } dbug_settings_t; |
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122 | |
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123 | #define DBUG_SETTINGS (*(const dbug_settings_t *)0xFC020000) |
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124 | #endif /* HAS_DBUG */ |
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125 | |
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126 | void bsp_cacr_set_flags(uint32_t flags); |
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127 | |
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128 | void bsp_cacr_set_self_clear_flags(uint32_t flags); |
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129 | |
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130 | void bsp_cacr_clear_flags(uint32_t flags); |
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131 | |
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132 | #ifdef __cplusplus |
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133 | } |
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134 | #endif |
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135 | |
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136 | /** @} */ |
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137 | |
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138 | #endif |
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