source: rtems/bsps/m68k/gen68340/include/m340uart.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup m68k_gen68340
5 *
6 * @brief UART console driver definitions.
7 */
8
9/*
10 *  Header file for console driver
11 *  defines for accessing M68340/68349 UART registers
12 *
13 *  Author:
14 *  Geoffroy Montel
15 *  France Telecom - CNET/DSM/TAM/CAT
16 *  4, rue du Clos Courtel
17 *  35512 CESSON-SEVIGNE
18 *  FRANCE
19 *
20 *  e-mail: g_montel@yahoo.com
21 *
22 *
23 *  COPYRIGHT (c) 1989-2008.
24 *  On-Line Applications Research Corporation (OAR).
25 *
26 *  The license and distribution terms for this file may be
27 *  found in the file LICENSE in this distribution or at
28 *  http://www.rtems.org/license/LICENSE.
29 */
30
31#ifndef __m340uart_H__
32#define __m340uart_H__
33
34/* UART initialisation */
35#define UART_CHANNEL_A                  0
36#define UART_CHANNEL_B                  1
37#define UART_NUMBER_OF_CHANNELS         2
38#define UART_CONSOLE_NAME               "/dev/console"
39#define UART_RAW_IO_NAME                "/dev/tty1"
40#define UART_FIFO_FULL                  0
41#define UART_CRR                        1
42#define UART_INTERRUPTS                 0
43#define UART_POLLING                    1
44#define UART_TERMIOS_CONSOLE            0
45#define UART_TERMIOS_RAW                1
46#define UART_TERMIOS_MIN_DEFAULT        1
47#define UART_TERMIOS_TIME_DEFAULT       0
48
49void Init_UART_Table(void);
50
51typedef struct {
52                uint8_t                 enable;
53                uint16_t                rx_buffer_size; /* NOT IMPLEMENTED */
54                uint16_t                tx_buffer_size; /* NOT IMPLEMENTED */
55               } uart_termios_config;
56
57typedef struct { /* for one channel */
58                uint8_t                 enable;         /* use this channel */
59                char                    name[64];       /* use UART_CONSOLE_NAME for console purpose */
60                uint8_t                 parity_mode;    /* parity mode, see MR1 section for defines */
61                uint8_t                 bits_per_char;  /* bits per character, see MR1 section for defines  */
62                float                   rx_baudrate;    /* Rx baudrate */
63                float                   tx_baudrate;    /* Tx baudrate */
64                uint8_t                 rx_mode;        /* FIFO Full (UART_FIFO_FULL) or ChannelReceiverReady (UART_CRR) */
65                uint8_t                 mode;           /* use interrupts (UART_INTERRUPTS) or polling (UART_POLLING) */
66                uart_termios_config     termios;
67               } uart_channel_config;
68
69extern uart_channel_config              m340_uart_config[UART_NUMBER_OF_CHANNELS];
70
71typedef  struct {
72                 int    set;    /* number of the m340 baud speed set */
73                 int    rcs;    /* RCS for the needed baud set */
74                 int    tcs;    /* TCS for the needed baud set */
75                } t_baud_speed;
76
77typedef  struct {
78                 t_baud_speed   baud_speed_table[2];
79                 short          nb;
80                } t_baud_speed_table;
81
82extern t_baud_speed_table
83Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_TransmitterBaudRate, uint8_t         enableA,
84                            float ChannelB_ReceiverBaudRate, float ChannelB_TransmitterBaudRate, uint8_t         enableB);
85
86extern rtems_isr InterruptHandler (rtems_vector_number v);
87
88extern int dbugRead (int minor);
89extern ssize_t dbugWrite (int minor, const char *buf, size_t len);
90
91extern float m340_Baud_Rates_Table[16][2];
92
93/*  SR */
94#define m340_Rx_RDY             1
95#define m340_FFULL              (1<<1)
96#define m340_Tx_RDY             (1<<2)
97#define m340_TxEMP              (1<<3)
98#define m340_OE                 (1<<4)
99#define m340_PE                 (1<<5)
100#define m340_FE                 (1<<6)
101#define m340_RB                 (1<<7)
102
103/*  IER */
104#define m340_TxRDYA             1
105#define m340_RxRDYA             (1<<1)
106#define m340_TxRxRDYA           0x3
107#define m340_TxRDYB             (1<<4)
108#define m340_RxRDYB             (1<<5)
109#define m340_TxRxRDYB           0x30
110
111/*  CR */
112#define m340_Reset_Error_Status 0x40
113#define m340_Reset_Receiver     0x20
114#define m340_Reset_Transmitter  0x30
115#define m340_Transmitter_Enable (1<<2)
116#define m340_Receiver_Enable    1
117#define m340_Transmitter_Disable (2<<2)
118#define m340_Receiver_Disable   2
119
120/*  ACR */
121#define m340_BRG_Set1           0
122#define m340_BRG_Set2           (1<<7)
123
124/*  OPCR */
125#define m340_OPCR_Gal           0x0
126#define m340_OPCR_Aux           0xFF
127
128/*  ISR */
129#define m340_COS                (1<<7)
130#define m340_DBB                (1<<6)
131#define m340_XTAL_RDY           (1<<3)
132#define m340_DBA                (1<<2)
133
134/*  MR1 */
135#define m340_RxRTS              (1<<7)
136#define m340_R_F                (1<<6)          /* character or block mode */
137#define m340_ERR                (1<<5)
138#define m340_RxRTX              (1<<7)
139#define m340_Even_Parity        0
140#define m340_Odd_Parity         (1<<2)
141#define m340_Low_Parity         (2<<2)
142#define m340_High_Parity        (3<<2)
143#define m340_No_Parity          (4<<2)
144#define m340_Data_Character     (6<<2)
145#define m340_Address_Character  (7<<2)
146#define m340_5bpc               0x0
147#define m340_6bpc               0x1
148#define m340_7bpc               0x2
149#define m340_8bpc               0x3
150
151/*  MR2 */
152#define m340_normal             (0<<6)
153#define m340_automatic_echo     (1<<6)
154#define m340_local_loopback     (2<<6)
155#define m340_remote_loopback    (3<<6)
156#define m340_TxRTS              (1<<5)
157#define m340_TxCTS              (1<<4)
158
159/* Baud rates for Transmitter/Receiver */
160#define SCLK    1               /* put your own SCLK value here */
161
162#endif
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