1 | /* |
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2 | * Clock Driver for MCF5272 CPU |
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3 | * |
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4 | * This driver initailizes timer1 on the MCF5272 as the |
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5 | * main system clock |
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6 | */ |
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7 | |
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8 | /* |
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9 | * Copyright 2004 Cogent Computer Systems |
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10 | * Author: Jay Monkman <jtm@lopingdog.com> |
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11 | * |
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12 | * Based on MCF5206 clock driver by |
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13 | * Victor V. Vengerov <vvv@oktet.ru> |
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14 | * |
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15 | * Based on work: |
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16 | * David Fiddes, D.J@fiddes.surfaid.org |
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17 | * http://www.calm.hw.ac.uk/davidf/coldfire/ |
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18 | * |
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19 | * COPYRIGHT (c) 1989-1998. |
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20 | * On-Line Applications Research Corporation (OAR). |
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21 | * |
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22 | * The license and distribution terms for this file may be |
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23 | * found in the file LICENSE in this distribution or at |
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24 | * http://www.rtems.org/license/LICENSE. |
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25 | */ |
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26 | |
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27 | #include <stdlib.h> |
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28 | #include <bsp.h> |
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29 | #include <rtems/libio.h> |
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30 | #include <mcf5272/mcf5272.h> |
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31 | #include <rtems/clockdrv.h> |
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32 | |
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33 | /* |
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34 | * Clock_driver_ticks is a monotonically increasing counter of the |
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35 | * number of clock ticks since the driver was initialized. |
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36 | */ |
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37 | volatile uint32_t Clock_driver_ticks; |
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38 | |
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39 | rtems_isr (*rtems_clock_hook)(rtems_vector_number) = NULL; |
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40 | |
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41 | static rtems_isr |
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42 | Clock_isr (rtems_vector_number vector) |
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43 | { |
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44 | /* Clear pending interrupt... */ |
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45 | g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; |
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46 | |
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47 | /* Announce the clock tick */ |
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48 | Clock_driver_ticks++; |
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49 | rtems_clock_tick(); |
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50 | if (rtems_clock_hook != NULL) { |
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51 | rtems_clock_hook(vector); |
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52 | } |
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53 | } |
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54 | |
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55 | static void |
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56 | Clock_exit(void) |
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57 | { |
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58 | uint32_t icr; |
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59 | |
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60 | /* disable all timer1 interrupts */ |
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61 | icr = g_intctrl_regs->icr1; |
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62 | icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); |
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63 | icr |= (MCF5272_ICR1_TMR1_IPL(0) | MCF5272_ICR1_TMR1_PI); |
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64 | g_intctrl_regs->icr1 = icr; |
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65 | |
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66 | /* reset timer1 */ |
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67 | g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; |
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68 | |
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69 | /* clear pending */ |
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70 | g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; |
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71 | } |
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72 | |
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73 | static void |
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74 | Install_clock(rtems_isr_entry clock_isr) |
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75 | { |
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76 | uint32_t icr; |
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77 | |
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78 | Clock_driver_ticks = 0; |
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79 | |
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80 | /* Register the interrupt handler */ |
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81 | set_vector(clock_isr, BSP_INTVEC_TMR1, 1); |
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82 | |
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83 | /* Reset timer 1 */ |
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84 | g_timer_regs->tmr1 = MCF5272_TMR_RST; |
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85 | g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; |
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86 | g_timer_regs->tmr1 = MCF5272_TMR_RST; |
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87 | g_timer_regs->tcn1 = 0; /* reset counter */ |
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88 | g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; |
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89 | |
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90 | /* Set Timer 1 prescaler so that it counts in microseconds */ |
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91 | g_timer_regs->tmr1 = ( |
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92 | ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | |
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93 | MCF5272_TMR_CE_DISABLE | |
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94 | MCF5272_TMR_ORI | |
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95 | MCF5272_TMR_FRR | |
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96 | MCF5272_TMR_CLK_MSTR | |
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97 | MCF5272_TMR_RST)); |
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98 | |
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99 | /* Set the timer timeout value from the BSP config */ |
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100 | g_timer_regs->trr1 = rtems_configuration_get_microseconds_per_tick() - 1; |
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101 | |
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102 | /* Feed system frequency to the timer */ |
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103 | g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR; |
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104 | |
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105 | /* Configure timer1 interrupts */ |
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106 | icr = g_intctrl_regs->icr1; |
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107 | icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); |
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108 | icr |= (MCF5272_ICR1_TMR1_IPL(BSP_INTLVL_TMR1) | MCF5272_ICR1_TMR1_PI); |
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109 | g_intctrl_regs->icr1 = icr; |
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110 | |
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111 | /* Register the driver exit procedure so we can shutdown */ |
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112 | atexit(Clock_exit); |
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113 | } |
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114 | |
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115 | void _Clock_Initialize( void ) |
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116 | { |
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117 | Install_clock (Clock_isr); |
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118 | } |
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