[21dd58d9] | 1 | /** |
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| 2 | * @file |
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| 3 | * @ingroup zynq_uart |
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| 4 | * @brief UART support. |
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| 5 | */ |
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| 6 | |
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[a94d46c8] | 7 | /* |
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[f1eedbd] | 8 | * SPDX-License-Identifier: BSD-2-Clause |
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[a94d46c8] | 9 | * |
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[f1eedbd] | 10 | * Copyright (C) 2013, XXX embedded brains GmbH |
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[a94d46c8] | 11 | * |
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[f1eedbd] | 12 | * Redistribution and use in source and binary forms, with or without |
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| 13 | * modification, are permitted provided that the following conditions |
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| 14 | * are met: |
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| 15 | * 1. Redistributions of source code must retain the above copyright |
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| 16 | * notice, this list of conditions and the following disclaimer. |
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| 17 | * 2. Redistributions in binary form must reproduce the above copyright |
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| 18 | * notice, this list of conditions and the following disclaimer in the |
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| 19 | * documentation and/or other materials provided with the distribution. |
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| 20 | * |
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| 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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| 24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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| 25 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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| 26 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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| 27 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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| 28 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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| 29 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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| 30 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 31 | * POSSIBILITY OF SUCH DAMAGE. |
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[a94d46c8] | 32 | */ |
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| 33 | |
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| 34 | #ifndef LIBBSP_ARM_XILINX_ZYNQ_UART_H |
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| 35 | #define LIBBSP_ARM_XILINX_ZYNQ_UART_H |
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| 36 | |
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[6b2fcc4] | 37 | #include <rtems/termiostypes.h> |
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[a94d46c8] | 38 | |
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| 39 | #ifdef __cplusplus |
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| 40 | extern "C" { |
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| 41 | #endif /* __cplusplus */ |
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| 42 | |
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[21dd58d9] | 43 | /** |
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| 44 | * @defgroup zynq_uart UART Support |
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[c991eeec] | 45 | * @ingroup RTEMSBSPsARMZynq |
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[21dd58d9] | 46 | * @brief UART Support |
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[f085957] | 47 | * |
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| 48 | * This driver operates an instance of the Cadence UART present in the |
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| 49 | * family of Xilinx Zynq SoCs. |
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[21dd58d9] | 50 | */ |
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| 51 | |
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[6b2fcc4] | 52 | typedef struct { |
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| 53 | rtems_termios_device_context base; |
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| 54 | volatile struct zynq_uart *regs; |
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[11f0d52] | 55 | bool transmitting; |
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[6b2fcc4] | 56 | rtems_vector_number irq; |
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| 57 | } zynq_uart_context; |
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| 58 | |
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[b0c420b9] | 59 | extern const rtems_termios_device_handler zynq_uart_handler; |
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[6b2fcc4] | 60 | |
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| 61 | #define ZYNQ_UART_DEFAULT_BAUD 115200 |
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| 62 | |
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[f085957] | 63 | #ifndef ZYNQ_CLOCK_UART |
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| 64 | #define ZYNQ_CLOCK_UART 100000000 |
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| 65 | #endif |
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| 66 | |
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[6b2fcc4] | 67 | void zynq_uart_initialize(rtems_termios_device_context *base); |
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| 68 | |
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| 69 | int zynq_uart_read_polled(rtems_termios_device_context *base); |
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| 70 | |
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| 71 | void zynq_uart_write_polled( |
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| 72 | rtems_termios_device_context *base, |
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| 73 | char c |
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| 74 | ); |
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[a94d46c8] | 75 | |
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[8fd465e] | 76 | /** |
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| 77 | * Flush TX FIFO and wait until it is empty. Used in bsp_reset. |
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| 78 | */ |
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[6b2fcc4] | 79 | void zynq_uart_reset_tx_flush(zynq_uart_context *ctx); |
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[8fd465e] | 80 | |
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[5686b44d] | 81 | int zynq_cal_baud_rate( |
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| 82 | uint32_t baudrate, |
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| 83 | uint32_t* brgr, |
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| 84 | uint32_t* bauddiv, |
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| 85 | uint32_t modereg |
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| 86 | ); |
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| 87 | |
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[a94d46c8] | 88 | #ifdef __cplusplus |
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| 89 | } |
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| 90 | #endif /* __cplusplus */ |
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| 91 | |
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| 92 | #endif /* LIBBSP_ARM_XILINX_ZYNQ_UART_H */ |
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