source: rtems/bsps/include/dev/irq/arm-gic-tm27.h @ f8ad5bb2

Last change on this file since f8ad5bb2 was f8ad5bb2, checked in by Kinsey Moore <kinsey.moore@…>, on 08/28/20 at 03:13:47

bsps: Break out AArch32 GICv3 support

This breaks out AArch32-specific code so that the shared GICv3 code can
be reused by other architectures.

  • Property mode set to 100644
File size: 2.1 KB
Line 
1/**
2 *  @file
3 *
4 *  @ingroup arm_gic
5 *
6 *  @brief ARM GIC TM27 Support
7 */
8
9/*
10 * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <info@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _RTEMS_TMTEST27
24#error "This is an RTEMS internal file you must not include directly."
25#endif
26
27#ifndef LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
28#define LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
29
30#include <assert.h>
31
32#include <bsp.h>
33#include <bsp/irq.h>
34
35#define MUST_WAIT_FOR_INTERRUPT 1
36
37#define ARM_GIC_TM27_IRQ_LOW ARM_GIC_IRQ_SGI_12
38
39#define ARM_GIC_TM27_IRQ_HIGH ARM_GIC_IRQ_SGI_13
40
41#define ARM_GIC_TM27_PRIO_LOW 0x80
42
43#define ARM_GIC_TM27_PRIO_HIGH 0x00
44
45static inline void Install_tm27_vector(void (*handler)(rtems_vector_number))
46{
47  rtems_status_code sc = rtems_interrupt_handler_install(
48    ARM_GIC_TM27_IRQ_LOW,
49    "tm27 low",
50    RTEMS_INTERRUPT_UNIQUE,
51    (rtems_interrupt_handler) handler,
52    NULL
53  );
54  assert(sc == RTEMS_SUCCESSFUL);
55
56  sc = arm_gic_irq_set_priority(
57    ARM_GIC_TM27_IRQ_LOW,
58    ARM_GIC_TM27_PRIO_LOW
59  );
60  assert(sc == RTEMS_SUCCESSFUL);
61
62  sc = rtems_interrupt_handler_install(
63    ARM_GIC_TM27_IRQ_HIGH,
64    "tm27 high",
65    RTEMS_INTERRUPT_UNIQUE,
66    (rtems_interrupt_handler) handler,
67    NULL
68  );
69  assert(sc == RTEMS_SUCCESSFUL);
70
71  sc = arm_gic_irq_set_priority(
72    ARM_GIC_TM27_IRQ_HIGH,
73    ARM_GIC_TM27_PRIO_HIGH
74  );
75  assert(sc == RTEMS_SUCCESSFUL);
76}
77
78static inline void Cause_tm27_intr(void)
79{
80  rtems_status_code sc = arm_gic_irq_generate_software_irq(
81    ARM_GIC_TM27_IRQ_LOW,
82    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF,
83    0
84  );
85  assert(sc == RTEMS_SUCCESSFUL);
86}
87
88static inline void Clear_tm27_intr(void)
89{
90  /* Nothing to do */
91}
92
93static inline void Lower_tm27_intr(void)
94{
95  rtems_status_code sc = arm_gic_irq_generate_software_irq(
96    ARM_GIC_TM27_IRQ_HIGH,
97    ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF,
98    0
99  );
100  assert(sc == RTEMS_SUCCESSFUL);
101}
102
103#endif /* LIBBSP_ARM_SHARED_ARM_GIC_TM27_H */
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