source: rtems/bsps/include/dev/irq/arm-gic-tm27.h @ 2ee12f02

Last change on this file since 2ee12f02 was 2ee12f02, checked in by Kinsey Moore <kinsey.moore@…>, on 03/02/21 at 20:11:49

bsps: Allow override of ARM TM27 IRQs

ZynqMP hardware appears to have an odd hard-wired SGI implementation in
which the SGIs are permanently set as enabled or disabled. Allow the
TM27 IRQs to be overridden as necessary.

  • Property mode set to 100644
File size: 2.2 KB
Line 
1/**
2 *  @file
3 *
4 *  @ingroup arm_gic
5 *
6 *  @brief ARM GIC TM27 Support
7 */
8
9/*
10 * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <info@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _RTEMS_TMTEST27
24#error "This is an RTEMS internal file you must not include directly."
25#endif
26
27#ifndef LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
28#define LIBBSP_ARM_SHARED_ARM_GIC_TM27_H
29
30#include <assert.h>
31
32#include <bsp.h>
33#include <bsp/irq.h>
34
35#define MUST_WAIT_FOR_INTERRUPT 1
36
37#ifndef ARM_GIC_TM27_IRQ_LOW
38#define ARM_GIC_TM27_IRQ_LOW ARM_GIC_IRQ_SGI_12
39#endif
40
41#ifndef ARM_GIC_TM27_IRQ_HIGH
42#define ARM_GIC_TM27_IRQ_HIGH ARM_GIC_IRQ_SGI_13
43#endif
44
45#define ARM_GIC_TM27_PRIO_LOW 0x80
46
47#define ARM_GIC_TM27_PRIO_HIGH 0x00
48
49static inline void Install_tm27_vector(void (*handler)(rtems_vector_number))
50{
51  rtems_status_code sc = rtems_interrupt_handler_install(
52    ARM_GIC_TM27_IRQ_LOW,
53    "tm27 low",
54    RTEMS_INTERRUPT_UNIQUE,
55    (rtems_interrupt_handler) handler,
56    NULL
57  );
58  assert(sc == RTEMS_SUCCESSFUL);
59
60  sc = arm_gic_irq_set_priority(
61    ARM_GIC_TM27_IRQ_LOW,
62    ARM_GIC_TM27_PRIO_LOW
63  );
64  assert(sc == RTEMS_SUCCESSFUL);
65
66  sc = rtems_interrupt_handler_install(
67    ARM_GIC_TM27_IRQ_HIGH,
68    "tm27 high",
69    RTEMS_INTERRUPT_UNIQUE,
70    (rtems_interrupt_handler) handler,
71    NULL
72  );
73  assert(sc == RTEMS_SUCCESSFUL);
74
75  sc = arm_gic_irq_set_priority(
76    ARM_GIC_TM27_IRQ_HIGH,
77    ARM_GIC_TM27_PRIO_HIGH
78  );
79  assert(sc == RTEMS_SUCCESSFUL);
80}
81
82static inline void Cause_tm27_intr(void)
83{
84  rtems_status_code sc = arm_gic_irq_generate_software_irq(
85    ARM_GIC_TM27_IRQ_LOW,
86    1U << _SMP_Get_current_processor()
87  );
88  assert(sc == RTEMS_SUCCESSFUL);
89}
90
91static inline void Clear_tm27_intr(void)
92{
93  /* Nothing to do */
94}
95
96static inline void Lower_tm27_intr(void)
97{
98  rtems_status_code sc = arm_gic_irq_generate_software_irq(
99    ARM_GIC_TM27_IRQ_HIGH,
100    1U << _SMP_Get_current_processor()
101  );
102  assert(sc == RTEMS_SUCCESSFUL);
103}
104
105#endif /* LIBBSP_ARM_SHARED_ARM_GIC_TM27_H */
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