source: rtems/bsps/i386/shared/irq/elcr.h @ 8f8ccee

5
Last change on this file since 8f8ccee was 8f8ccee, checked in by Sebastian Huber <sebastian.huber@…>, on 04/23/18 at 07:50:39

bsps: Move interrupt controller support to bsps

This patch is a part of the BSP source reorganization.

Update #3285.
  • Property mode set to 100644
File size: 722 bytes
Line 
1/*
2 * Copyright 2016 Chris Johns <chrisj@rtems.org>
3 *
4 * Header for the FreeBSD ported elcr.c
5 */
6
7#ifndef _IRQ_ELCR_H_
8#define _IRQ_ELCR_H_
9
10#include <sys/cdefs.h>
11
12enum intr_trigger {
13  INTR_TRIGGER_EDGE,
14  INTR_TRIGGER_LEVEL
15};
16
17/*
18 * Check to see if we have what looks like a valid ELCR.  We do this by
19 * verifying that IRQs 0, 1, 2, and 13 are all edge triggered.
20 */
21int elcr_probe(void);
22
23/*
24 * Returns 1 for level trigger, 0 for edge.
25 */
26enum intr_trigger elcr_read_trigger(u_int irq);
27
28/*
29 * Set the trigger mode for a specified IRQ.  Mode of 0 means edge triggered,
30 * and a mode of 1 means level triggered.
31 */
32void elcr_write_trigger(u_int irq, enum intr_trigger trigger);
33
34void elcr_resume(void);
35
36
37#endif
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