source: rtems/bsps/i386/shared/cache/cache.c @ 12dfe5dc

5
Last change on this file since 12dfe5dc was 12dfe5dc, checked in by Joel Sherrill <joel@…>, on 01/16/19 at 21:42:18

bsps/i386/shared/cache/cache.c: Make compile

  • Property mode set to 100644
File size: 2.2 KB
Line 
1/*
2 *  Cache Management Support Routines for the i386
3 */
4
5#include <rtems.h>
6#include <rtems/score/cpu.h>
7#include <libcpu/page.h>
8
9#define I386_CACHE_ALIGNMENT 16
10#define CPU_DATA_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
11#define CPU_INSTRUCTION_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
12
13void _CPU_disable_cache(void)
14{
15  unsigned int regCr0;
16
17  regCr0 = i386_get_cr0();
18  regCr0 |= CR0_PAGE_LEVEL_CACHE_DISABLE;
19  regCr0 |= CR0_NO_WRITE_THROUGH;
20  i386_set_cr0( regCr0 );
21  rtems_cache_flush_entire_data();
22}
23
24/*
25 * Enable the entire cache
26 */
27
28void _CPU_enable_cache(void)
29{
30  unsigned int regCr0;
31
32  regCr0 = i386_get_cr0();
33  regCr0 &= ~(CR0_PAGE_LEVEL_CACHE_DISABLE);
34  regCr0 &= ~(CR0_NO_WRITE_THROUGH);
35  i386_set_cr0( regCr0 );
36  /*rtems_cache_flush_entire_data();*/
37}
38
39/*
40 * CACHE MANAGER: The following functions are CPU-specific.
41 * They provide the basic implementation for the rtems_* cache
42 * management routines. If a given function has no meaning for the CPU,
43 * it does nothing by default.
44 *
45 * FIXME: The routines below should be implemented per CPU,
46 *        to accomodate the capabilities of each.
47 */
48
49#if defined(I386_CACHE_ALIGNMENT)
50static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
51static void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
52static void _CPU_cache_freeze_data(void) {}
53static void _CPU_cache_unfreeze_data(void) {}
54static void _CPU_cache_flush_entire_data(void)
55{
56  __asm__ volatile ("wbinvd");
57}
58
59static void _CPU_cache_invalidate_entire_data(void)
60{
61  __asm__ volatile ("invd");
62}
63
64static void _CPU_cache_invalidate_entire_instruction(void)
65{
66  __asm__ volatile ("invd");
67}
68
69static void _CPU_cache_invalidate_1_instruction_line(const void *i_addr)
70{
71  _CPU_cache_invalidate_entire_instruction();
72}
73
74static void _CPU_cache_enable_data(void)
75{
76  _CPU_enable_cache();
77}
78
79static void _CPU_cache_disable_data(void)
80{
81  _CPU_disable_cache();
82}
83
84static void _CPU_cache_enable_instruction(void)
85{
86  _CPU_enable_cache();
87}
88
89static void _CPU_cache_disable_instruction(void)
90{
91  _CPU_disable_cache();
92}
93
94static void _CPU_cache_freeze_instruction(void)
95{
96}
97
98static void _CPU_cache_unfreeze_instruction(void)
99{
100}
101
102#endif
103
104#include "../../../shared/cache/cacheimpl.h"
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