source: rtems/bsps/i386/pc386/start/displayCpu.c @ a7fa9e91

5
Last change on this file since a7fa9e91 was a7fa9e91, checked in by Sebastian Huber <sebastian.huber@…>, on 03/20/18 at 15:16:53

bsp/pc386: Move libcpu content to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 6.0 KB
Line 
1/*
2 *  This file contains code for displaying the Intel Cpu identification
3 *  that has been performed by checkCPUtypeSetCr0 function.
4 */
5
6/*
7 *  This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com>
8 *  to define more capability bits, pick up more CPU model information,
9 *  and add more model strings. --joel (April 2010)
10 *
11 *  COPYRIGHT (c) 1998 valette@crf.canon.fr
12 *  COPYRIGHT (c) 2010 OAR Corporation
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.org/license/LICENSE.
17 */
18
19/*
20 * Tell us the machine setup..
21 */
22#include <stdio.h>
23#include <rtems/score/cpu.h>
24#include <string.h>
25#include <libcpu/cpuModel.h>
26#include <rtems/bspIo.h>
27#include <rtems.h>
28
29unsigned char Cx86_step = 0;
30
31static const char *Cx86_type[] = {
32  "unknown", "1.3", "1.4", "1.5", "1.6",
33  "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
34  };
35
36static const char *i486model(unsigned int nr)
37{
38  static const char *model[] = {
39    "0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB",
40    "10","11","12","13","Am5x86-WT","Am5x86-WB"
41  };
42
43  if (nr < sizeof(model)/sizeof(char *))
44    return model[nr];
45  return NULL;
46}
47
48static const char * i586model(unsigned int nr)
49{
50  static const char *model[] = {
51    "0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83",
52    "Pentium MMX", NULL, NULL, "Mobile Pentium 75+",
53    "Mobile Pentium MMX"
54  };
55  if (nr < sizeof(model)/sizeof(char *))
56    return model[nr];
57  return NULL;
58}
59
60static const char *Cx86model(void)
61{
62  unsigned char nr6x86 = 0;
63  static const char *model[] = {
64    "unknown", "6x86", "6x86L", "6x86MX", "MII"
65  };
66
67  switch (x86) {
68    case 5:
69      /* cx8 flag only on 6x86L */
70      nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1);
71      break;
72    case 6:
73      nr6x86 = 3;
74      break;
75    default:
76      nr6x86 = 0;
77  }
78
79  /* We must get the stepping number by reading DIR1 */
80  outport_byte(0x22,0xff);
81  inport_byte(0x23, x86_mask);
82  switch (x86_mask) {
83    case 0x03:
84      Cx86_step =  1;  /* 6x86MX Rev 1.3 */
85      break;
86    case 0x04:
87      Cx86_step =  2;  /* 6x86MX Rev 1.4 */
88      break;
89    case 0x05:
90      Cx86_step =  3;  /* 6x86MX Rev 1.5 */
91      break;
92    case 0x06:
93      Cx86_step =  4;  /* 6x86MX Rev 1.6 */
94      break;
95    case 0x14:
96      Cx86_step =  5;  /* 6x86 Rev 2.4 */
97      break;
98    case 0x15:
99      Cx86_step =  6;  /* 6x86 Rev 2.5 */
100      break;
101    case 0x16:
102      Cx86_step =  7;  /* 6x86 Rev 2.6 */
103      break;
104    case 0x17:
105      Cx86_step =  8;  /* 6x86 Rev 2.7 or 3.7 */
106      break;
107    case 0x22:
108      Cx86_step =  9;  /* 6x86L Rev 4.2 */
109      break;
110    default:
111      Cx86_step = 0;
112  }
113  return model[nr6x86];
114}
115
116static const char * i686model(unsigned int nr)
117{
118  static const char *model[] = {
119    "PPro A-step",
120    "Pentium Pro"
121  };
122  if (nr < sizeof(model)/sizeof(char *))
123    return model[nr];
124  return NULL;
125}
126
127struct cpu_model_info {
128  int x86;
129  char *model_names[16];
130};
131
132static struct cpu_model_info amd_models[] = {
133  { 4,
134    { NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4",
135      "DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }},
136  { 5,
137    { "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)",
138      "K5 (PR-166)", "K5 (PR-200)", NULL, NULL,
139      "K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)",
140      "K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }},
141};
142
143static const char * AMDmodel(void)
144{
145  const char *p=NULL;
146  int i;
147
148  if (x86_model < 16)
149    for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++)
150      if (amd_models[i].x86 == x86) {
151        p = amd_models[i].model_names[(int)x86_model];
152        break;
153      }
154  return p;
155}
156
157static const char * getmodel(int x86, int model)
158{
159  const char *p = NULL;
160  static char nbuf[12];
161
162  if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
163    p = Cx86model();
164  else if(strcmp(x86_vendor_id, "AuthenticAMD")==0)
165    p = AMDmodel();
166  else {
167    switch (x86) {
168      case 4:
169        p = i486model(model);
170        break;
171      case 5:
172        p = i586model(model);
173        break;
174      case 6:
175        p = i686model(model);
176        break;
177    }
178  }
179  if (p)
180    return p;
181
182  sprintf(nbuf, "%d", model);
183  return nbuf;
184}
185
186void printCpuInfo(void)
187{
188  int i,j;
189  static const char *x86_cap_flags[] = {
190    "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
191    "cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov",
192    "pat", "pse36", "psn", "cflsh", "20", "ds", "acpi", "mmx",
193    "fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe"
194  };
195  static const char *x86_cap_x_flags[] = {
196    "sse3", "pclmulqdq", "dtes64", "monitor", "ds-cpl", "vmx", "smx", "est",
197    "tm2", "ssse3", "cnxt-id", "11", "12", "cmpxchg16b", "xtpr", "pdcm",
198    "16",  "pcid", "dca", "sse4.1", "sse4.2", "x2APIC", "movbe", "popcnt"
199    "24",  "aesni", "xsave", "xsave", "avx", "29", "30", "31"
200  };
201
202  printk("cpu         : %c86\n", x86+'0');
203  printk("model       : %s\n",
204   have_cpuid ? getmodel(x86, x86_model) : "unknown");
205  if (x86_vendor_id [0] == '\0')
206    strcpy(x86_vendor_id, "unknown");
207  printk("vendor_id   : %s\n", x86_vendor_id);
208
209  if (x86_mask) {
210    if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
211      printk("stepping    : %d\n", x86_mask);
212    }
213    else {       /* we have a Cyrix */
214      printk("stepping    : %s\n", Cx86_type[Cx86_step]);
215    }
216  } else
217    printk("stepping    : unknown\n");
218
219  printk("fpu         : %s\n", (hard_math ? "yes" : "no"));
220  printk("cpuid       : %s\n", (have_cpuid ? "yes" : "no"));
221  printk("flags       :");
222  for ( i = j = 0 ; i < 32 ; i++ ) {
223    if ( x86_capability & (1 << i) ) {
224      if ( j && 0 == (j & 7) )
225    printk("\n             ");
226      printk(" %s", x86_cap_flags[i]);
227      j++;
228    }
229  }
230  printk("\n");
231  printk("flags (ext.):");
232  for ( i = j = 0 ; i < 32 ; i++ ) {
233    if ( x86_capability_x & (1 << i) ) {
234      if ( j && 0 == (j & 7) )
235    printk("\n             ");
236      printk(" %s", x86_cap_x_flags[i]);
237      j++;
238    }
239  }
240  printk("\n");
241  printk( "x86_capability_ebx=0x%08x\n", x86_capability_ebx);
242  printk( "x86_capability_cores=0x%08x\n", x86_capability_cores);
243}
Note: See TracBrowser for help on using the repository browser.