source: rtems/bsps/i386/pc386/clock/ckinit.c @ 4925ab4

5
Last change on this file since 4925ab4 was 4925ab4, checked in by Jan Sommer <jan.sommer@…>, on Jun 11, 2021 at 7:35:30 AM

bsps/i386: Update calibration of TSC to be more accurate

Closes #4456

  • Property mode set to 100644
File size: 7.0 KB
Line 
1/**
2 *  @file
3 *
4 *  Clock Tick Device Driver
5 *
6 *  History:
7 *    + Original driver was go32 clock by Joel Sherrill
8 *    + go32 clock driver hardware code was inserted into new
9 *      boilerplate when the pc386 BSP by:
10 *        Pedro Miguel Da Cruz Neto Romano <pmcnr@camoes.rnl.ist.utl.pt>
11 *        Jose Rufino <ruf@asterix.ist.utl.pt>
12 *    + Reworked by Joel Sherrill to use clock driver template.
13 *      This removes all boilerplate and leave original hardware
14 *      code I developed for the go32 BSP.
15 */
16
17/*
18 *  COPYRIGHT (c) 1989-2012.
19 *  On-Line Applications Research Corporation (OAR).
20 *
21 *  The license and distribution terms for this file may be
22 *  found in the file LICENSE in this distribution or at
23 *  http://www.rtems.org/license/LICENSE.
24 */
25
26#include <bsp.h>
27#include <bsp/irq-generic.h>
28#include <bspopts.h>
29#include <libcpu/cpuModel.h>
30#include <assert.h>
31#include <rtems/timecounter.h>
32#ifdef RTEMS_SMP
33#include <rtems/score/smpimpl.h>
34#endif
35
36#define CLOCK_VECTOR 0
37
38volatile uint32_t pc386_microseconds_per_isr;
39volatile uint32_t pc386_isrs_per_tick;
40uint32_t pc386_clock_click_count;
41
42/* forward declaration */
43void Clock_isr(void *param);
44static void Clock_isr_handler(void *param);
45
46/*
47 * Roughly the number of cycles per second. Note that these
48 * will be wildly inaccurate if the chip speed changes due to power saving
49 * or thermal modes.
50 *
51 * NOTE: These are only used when the TSC method is used.
52 */
53static uint64_t pc586_tsc_frequency;
54
55static struct timecounter pc386_tc;
56
57/* this driver may need to count ISRs per tick */
58#define CLOCK_DRIVER_ISRS_PER_TICK       1
59#define CLOCK_DRIVER_ISRS_PER_TICK_VALUE pc386_isrs_per_tick
60
61extern volatile uint32_t Clock_driver_ticks;
62
63#define READ_8254( _lsb, _msb )                               \
64  do { outport_byte(TIMER_MODE, TIMER_SEL0|TIMER_LATCH);      \
65     inport_byte(TIMER_CNTR0, _lsb);                          \
66     inport_byte(TIMER_CNTR0, _msb);                          \
67  } while (0)
68
69
70#ifdef RTEMS_SMP
71#define Clock_driver_support_at_tick() \
72  do {                                                              \
73    Processor_mask targets;                                         \
74    _Processor_mask_Assign(&targets, _SMP_Get_online_processors()); \
75    _Processor_mask_Clear(&targets, _SMP_Get_current_processor());  \
76    _SMP_Multicast_action(&targets, rtems_timecounter_tick, NULL);               \
77  } while (0)
78#endif
79
80static uint32_t pc386_get_timecount_tsc(struct timecounter *tc)
81{
82  return (uint32_t)rdtsc();
83}
84
85static uint32_t pc386_get_timecount_i8254(struct timecounter *tc)
86{
87  uint32_t                 irqs;
88  uint8_t                  lsb, msb;
89  rtems_interrupt_lock_context lock_context;
90
91  /*
92   * Fetch all the data in an interrupt critical section.
93   */
94
95  rtems_interrupt_lock_acquire(&rtems_i386_i8254_access_lock, &lock_context);
96
97    READ_8254(lsb, msb);
98    irqs = Clock_driver_ticks;
99
100  rtems_interrupt_lock_release(&rtems_i386_i8254_access_lock, &lock_context);
101
102  return (irqs + 1) * pc386_microseconds_per_isr - ((msb << 8) | lsb);
103}
104
105/*
106 * Calibrate CPU cycles per tick. Interrupts should be disabled.
107 * Will also set the PIT, so call this before registering the
108 * periodic timer for rtems tick generation
109 */
110static void calibrate_tsc(void)
111{
112  uint64_t              begin_time;
113  uint8_t               lsb, msb;
114  uint32_t              max_timer_value;
115  uint32_t              last_tick, cur_tick;
116  int32_t               diff, remaining;
117
118  /* Set the timer to free running mode */
119  outport_byte(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_INTTC);
120  /* Reset the 16 timer reload value, first LSB, then MSB */
121  outport_byte(TIMER_CNTR0, 0);
122  outport_byte(TIMER_CNTR0, 0);
123  /* We use the full 16 bit */
124  max_timer_value = 0xffff;
125  /* Calibrate for 1s, i.e. TIMER_TICK PIT ticks */
126  remaining = TIMER_TICK;
127
128  begin_time = rdtsc();
129  READ_8254(lsb, msb);
130  last_tick = (msb << 8) | lsb;
131  while(remaining > 0) {
132    READ_8254(lsb, msb);
133    cur_tick = (msb << 8) | lsb;
134    /* PIT counts down, so subtract cur from last */
135    diff = last_tick - cur_tick;
136    last_tick = cur_tick;
137    if (diff < 0) {
138        diff += max_timer_value;
139    }
140    remaining -= diff;
141  }
142
143  pc586_tsc_frequency = rdtsc() - begin_time;
144
145#if 0
146  printk( "CPU clock at %u Hz\n", (uint32_t)(pc586_tsc_frequency ));
147#endif
148}
149
150static void clockOn(void)
151{
152
153  /*
154   * First calibrate the TSC. Do this every time we
155   * turn the clock on in case the CPU clock speed has changed.
156   */
157  if ( x86_has_tsc() ) {
158    calibrate_tsc();
159  }
160
161  rtems_interrupt_lock_context lock_context;
162  pc386_isrs_per_tick        = 1;
163  pc386_microseconds_per_isr = rtems_configuration_get_microseconds_per_tick();
164
165  while (US_TO_TICK(pc386_microseconds_per_isr) > 65535) {
166    pc386_isrs_per_tick  *= 10;
167    pc386_microseconds_per_isr /= 10;
168  }
169  pc386_clock_click_count = US_TO_TICK(pc386_microseconds_per_isr);
170
171  #if 0
172    printk( "configured usecs per tick=%d \n",
173      rtems_configuration_get_microseconds_per_tick() );
174    printk( "Microseconds per ISR =%d\n", pc386_microseconds_per_isr );
175    printk( "final ISRs per=%d\n", pc386_isrs_per_tick );
176    printk( "final timer counts=%d\n", pc386_clock_click_count );
177  #endif
178
179  rtems_interrupt_lock_acquire(&rtems_i386_i8254_access_lock, &lock_context);
180  outport_byte(TIMER_MODE, TIMER_SEL0|TIMER_16BIT|TIMER_RATEGEN);
181  outport_byte(TIMER_CNTR0, pc386_clock_click_count >> 0 & 0xff);
182  outport_byte(TIMER_CNTR0, pc386_clock_click_count >> 8 & 0xff);
183  rtems_interrupt_lock_release(&rtems_i386_i8254_access_lock, &lock_context);
184
185  bsp_interrupt_vector_enable( BSP_PERIODIC_TIMER );
186}
187
188bool Clock_isr_enabled = false;
189static void Clock_isr_handler(void *param)
190{
191  if ( Clock_isr_enabled )
192    Clock_isr( param );
193}
194
195void Clock_driver_install_handler(void)
196{
197  rtems_status_code status;
198
199  status = rtems_interrupt_handler_install(
200    BSP_PERIODIC_TIMER,
201    "ckinit",
202    RTEMS_INTERRUPT_UNIQUE,
203    Clock_isr_handler,
204    NULL
205  );
206  assert(status == RTEMS_SUCCESSFUL);
207  clockOn();
208}
209
210#define Clock_driver_support_set_interrupt_affinity(online_processors) \
211  do { \
212    /* FIXME: Is there a way to do this on x86? */ \
213    (void) online_processors; \
214  } while (0)
215
216void Clock_driver_support_initialize_hardware(void)
217{
218  bool use_tsc = false;
219  bool use_8254 = false;
220
221  #if (CLOCK_DRIVER_USE_TSC == 1)
222    use_tsc = true;
223  #endif
224
225  #if (CLOCK_DRIVER_USE_8254 == 1)
226    use_8254 = true;
227  #endif
228
229  if ( !use_tsc && !use_8254 ) {
230    if ( x86_has_tsc() ) use_tsc  = true;
231    else                 use_8254 = true;
232  }
233
234  if ( use_8254 ) {
235    /* printk( "Use 8254\n" ); */
236    pc386_tc.tc_get_timecount = pc386_get_timecount_i8254;
237    pc386_tc.tc_counter_mask = 0xffffffff;
238    pc386_tc.tc_frequency = TIMER_TICK;
239  } else {
240    /* printk( "Use TSC\n" ); */
241    pc386_tc.tc_get_timecount = pc386_get_timecount_tsc;
242    pc386_tc.tc_counter_mask = 0xffffffff;
243    pc386_tc.tc_frequency = pc586_tsc_frequency;
244  }
245
246  pc386_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
247  rtems_timecounter_install(&pc386_tc);
248  Clock_isr_enabled = true;
249}
250
251#include "../../../shared/dev/clock/clockimpl.h"
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