source: rtems/bsps/i386/include/bsp/smp-imps.h @ 208cd6b

5
Last change on this file since 208cd6b was 208cd6b, checked in by Jan Sommer <jan.sommer@…>, on May 31, 2020 at 2:22:57 PM

bsps/pc386: Separate smp API functions. Makes smpfatal08 link

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File size: 7.1 KB
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1/**
2 * @file
3 * @ingroup i386_smp
4 * @brief Intel MultiProcessor Specification (MPS)
5 * version 1.1 and 1.4 SMP hardware control
6 */
7
8/*
9 * Author: Erich Boleyn  <erich@uruk.org>
10 *         http://www.uruk.org/~erich/
11 *
12 * Copyright (c) 1997-2011 Erich Boleyn.  All rights reserved.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 *    notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 *    notice, this list of conditions and the following disclaimer in the
21 *    documentation and/or other materials provided with the distribution.
22 * 3. The name of the author may not be used to endorse or promote products
23 *    derived from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 */
36
37/*
38 *  Header file implementing Intel MultiProcessor Specification (MPS)
39 *  version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs,
40 *  with hooks for running correctly on a standard PC without the hardware.
41 *
42 *  This file was created from information in the Intel MPS version 1.4
43 *  document, order number 242016-004, which can be ordered from the
44 *  Intel literature center.
45 */
46
47/*
48 *  This file is based upon code by Eric Boleyn as documented above. 
49 *  RTEMS support was added and minimal other changes were made. 
50 *  This should make it easier to compare this file with the original
51 *  version.
52 *
53 *  COPYRIGHT (c) 2011.
54 *  On-Line Applications Research Corporation (OAR).
55 *
56 *  The license and distribution terms for this file may be
57 *  found in the file LICENSE in this distribution or at
58 *  http://www.rtems.org/license/LICENSE.
59 */
60
61/**
62 *  @defgroup i386_smp SMP
63 *  @ingroup RTEMSBSPsI386
64 *  @brief
65 *  Header file implementing Intel MultiProcessor Specification (MPS)
66 *  version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs,
67 *  with hooks for running correctly on a standard PC without the hardware.
68 */
69
70#ifndef _SMP_IMPS_H
71#define _SMP_IMPS_H
72
73/* make sure "apic.h" is included */
74#ifndef _APIC_H
75#error          Must include "apic.h" before "smp-imps.h"
76#endif  /* !_APIC_H */
77
78/*
79 *  Defines used.
80 */
81
82#define IMPS_READ(x)    (*((volatile unsigned *) (x)))
83#define IMPS_WRITE(x,y) (*((volatile unsigned *) (x)) = (y))
84
85#ifdef IMPS_DEBUG
86#define IMPS_DEBUG_PRINT(x)  KERNEL_PRINT(x)
87#else  /* !IMPS_DEBUG */
88#define IMPS_DEBUG_PRINT(x)
89#endif /* !IMPS_DEBUG */
90
91#define IMPS_MAX_CPUS                   APIC_BCAST_ID
92
93/** @brief
94 *  This is the value that must be in the "sig" member of the MP
95 *  Floating Pointer Structure.
96 */
97#define IMPS_FPS_SIGNATURE      ('_' | ('M'<<8) | ('P'<<16) | ('_'<<24))
98#define IMPS_FPS_IMCRP_BIT      0x80
99#define IMPS_FPS_DEFAULT_MAX    7
100
101/** @brief
102 *  This is the value that must be in the "sig" member of the MP
103 *  Configuration Table Header.
104 */
105#define IMPS_CTH_SIGNATURE      ('P' | ('C'<<8) | ('M'<<16) | ('P'<<24))
106
107/** @brief
108 *  These are the "type" values for Base MP Configuration Table entries.
109 */
110#define         IMPS_FLAG_ENABLED       1
111#define IMPS_BCT_PROCESSOR              0
112#define         IMPS_CPUFLAG_BOOT       2
113#define IMPS_BCT_BUS                    1
114#define IMPS_BCT_IOAPIC                 2
115#define IMPS_BCT_IO_INTERRUPT           3
116#define IMPS_BCT_LOCAL_INTERRUPT        4
117#define         IMPS_INT_INT            0
118#define         IMPS_INT_NMI            1
119#define         IMPS_INT_SMI            2
120#define         IMPS_INT_EXTINT         3
121
122
123/*
124 *  Typedefs and data item definitions done here.
125 */
126
127typedef struct imps_fps imps_fps;       ///< MP floating pointer structure
128typedef struct imps_cth imps_cth;       ///< MP configuration table header
129typedef struct imps_processor imps_processor;
130typedef struct imps_bus imps_bus;
131typedef struct imps_ioapic imps_ioapic;
132typedef struct imps_interrupt imps_interrupt;
133
134
135/*
136 *  Data structures defined here
137 */
138
139/** @brief
140 *  MP Floating Pointer Structure (fps)
141 *
142 *  Look at page 4-3 of the MP spec for the starting definitions of
143 *  this structure.
144 */
145struct imps_fps
146{
147  unsigned sig;
148  imps_cth *cth_ptr;
149  unsigned char length;
150  unsigned char spec_rev;
151  unsigned char checksum;
152  unsigned char feature_info[5];
153};
154
155/** @brief
156 *  MP Configuration Table Header  (cth)
157 *
158 *  Look at page 4-5 of the MP spec for the starting definitions of
159 *  this structure.
160 */
161struct imps_cth
162{
163  unsigned sig;
164  unsigned short base_length;
165  unsigned char spec_rev;
166  unsigned char checksum;
167  char oem_id[8];
168  char prod_id[12];
169  unsigned oem_table_ptr;
170  unsigned short oem_table_size;
171  unsigned short entry_count;
172  unsigned lapic_addr;
173  unsigned short extended_length;
174  unsigned char extended_checksum;
175        char reserved[1];
176};
177
178/** @brief
179 *  Base MP Configuration Table Types.  They are sorted according to
180 *  type (i.e. all of type 0 come first, etc.).  Look on page 4-6 for
181 *  the start of the descriptions.
182 */
183
184struct imps_processor
185{
186  unsigned char type;                     ///< must be 0
187  unsigned char apic_id;
188  unsigned char apic_ver;
189  unsigned char flags;
190  unsigned signature;
191  unsigned features;
192  char reserved[8];
193};
194
195struct imps_bus
196{
197  unsigned char type;                     ///< must be 1
198  unsigned char id;
199  char bus_type[6];
200};
201
202struct imps_ioapic
203{
204  unsigned char type;                     ///< must be 2
205  unsigned char id;
206  unsigned char ver;
207  unsigned char flags;
208  unsigned addr;
209};
210
211struct imps_interrupt
212{
213  unsigned char type;                     ///< must be 3 or 4
214  unsigned char int_type;
215  unsigned short flags;
216  unsigned char source_bus_id;
217  unsigned char source_bus_irq;
218  unsigned char dest_apic_id;
219  unsigned char dest_apic_intin;
220};
221
222/*
223 *  Exported globals here.
224 */
225
226/** @brief
227 *  These map from virtual cpu numbers to APIC id's and back.
228 */
229extern unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS];
230extern unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
231
232/** @brief base address of application processor reset code at 0x70000 */
233extern char _binary_appstart_bin_start[];
234extern char _binary_appstart_bin_size[];
235
236/** @brief base address of the local apic. Usually 0xFEE00000 */
237extern unsigned imps_lapic_addr;
238
239/*
240 *  Defines that use variables
241 */
242#define IMPS_LAPIC_READ(x)  (*((volatile unsigned *) (imps_lapic_addr+(x))))
243#define IMPS_LAPIC_WRITE(x, y)   \
244   (*((volatile unsigned *) (imps_lapic_addr+(x))) = (y))
245
246#endif  /* !_SMP_IMPS_H */
247
248/** @} */
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