1 | /** |
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2 | * @file |
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3 | * @ingroup i386_apic |
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4 | * @brief Local and I/O APIC definitions |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Author: Erich Boleyn <erich@uruk.org> |
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9 | * http://www.uruk.org/~erich/ |
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10 | * |
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11 | * Copyright (c) 1997-2011 Erich Boleyn. All rights reserved. |
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12 | * |
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13 | * Redistribution and use in source and binary forms, with or without |
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14 | * modification, are permitted provided that the following conditions |
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15 | * are met: |
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16 | * 1. Redistributions of source code must retain the above copyright |
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17 | * notice, this list of conditions and the following disclaimer. |
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18 | * 2. Redistributions in binary form must reproduce the above copyright |
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19 | * notice, this list of conditions and the following disclaimer in the |
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20 | * documentation and/or other materials provided with the distribution. |
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21 | * 3. The name of the author may not be used to endorse or promote products |
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22 | * derived from this software without specific prior written permission. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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25 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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26 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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27 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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28 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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29 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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30 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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31 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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32 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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33 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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34 | */ |
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35 | |
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36 | /** |
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37 | * @defgroup i386_apci |
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38 | * @ingroup i386_pci |
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39 | * @brief Intel Architecture local and I/O APIC definitions |
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40 | * @{ |
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41 | */ |
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42 | |
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43 | /* |
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44 | * Header file for Intel Architecture local and I/O APIC definitions. |
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45 | * |
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46 | * This file was created from information in the Intel Pentium Pro |
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47 | * Family Developer's Manual, Volume 3: Operating System Writer's |
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48 | * Manual, order number 242692-001, which can be ordered from the |
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49 | * Intel literature center. |
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50 | */ |
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51 | |
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52 | #ifndef _APIC_H |
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53 | #define _APIC_H |
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54 | |
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55 | /* |
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56 | * APIC Defines. |
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57 | */ |
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58 | |
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59 | /* |
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60 | * Recommendation: Don't use this except for MSI interrupt delivery. |
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61 | * In general, the "Destination Mode" can be used to control this, since |
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62 | * it is DIFFERENT (0xF) for Pentium and P6, but not on the same APIC |
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63 | * version for AMD Opteron. |
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64 | */ |
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65 | #define APIC_BCAST_ID 0xFF |
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66 | |
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67 | /* |
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68 | * APIC register definitions |
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69 | */ |
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70 | |
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71 | /* |
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72 | * Shared defines for I/O and local APIC definitions |
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73 | */ |
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74 | /** @brief APIC version register */ |
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75 | #define APIC_VERSION(x) ((x) & 0xFF) |
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76 | #define APIC_MAXREDIR(x) (((x) >> 16) & 0xFF) |
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77 | /** @brief APIC id register */ |
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78 | #define APIC_ID(x) ((x) >> 24) |
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79 | #define APIC_VER_NEW 0x10 |
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80 | |
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81 | #define IOAPIC_REGSEL 0 |
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82 | #define IOAPIC_RW 0x10 |
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83 | #define IOAPIC_ID 0 |
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84 | #define IOAPIC_VER 1 |
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85 | #define IOAPIC_REDIR 0x10 |
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86 | |
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87 | #define LAPIC_ID 0x20 |
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88 | #define LAPIC_VER 0x30 |
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89 | #define LAPIC_TPR 0x80 |
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90 | #define LAPIC_APR 0x90 |
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91 | #define LAPIC_PPR 0xA0 |
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92 | #define LAPIC_EOI 0xB0 |
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93 | #define LAPIC_LDR 0xD0 |
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94 | #define LAPIC_DFR 0xE0 |
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95 | #define LAPIC_SPIV 0xF0 |
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96 | #define LAPIC_SPIV_ENABLE_APIC 0x100 |
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97 | #define LAPIC_ISR 0x100 |
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98 | #define LAPIC_TMR 0x180 |
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99 | #define LAPIC_IRR 0x200 |
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100 | #define LAPIC_ESR 0x280 |
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101 | #define LAPIC_ICR 0x300 |
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102 | #define LAPIC_ICR_DS_SELF 0x40000 |
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103 | #define LAPIC_ICR_DS_ALLINC 0x80000 |
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104 | #define LAPIC_ICR_DS_ALLEX 0xC0000 |
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105 | #define LAPIC_ICR_TM_LEVEL 0x8000 |
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106 | #define LAPIC_ICR_LEVELASSERT 0x4000 |
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107 | #define LAPIC_ICR_STATUS_PEND 0x1000 |
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108 | #define LAPIC_ICR_DM_LOGICAL 0x800 |
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109 | #define LAPIC_ICR_DM_LOWPRI 0x100 |
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110 | #define LAPIC_ICR_DM_SMI 0x200 |
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111 | #define LAPIC_ICR_DM_NMI 0x400 |
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112 | #define LAPIC_ICR_DM_INIT 0x500 |
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113 | #define LAPIC_ICR_DM_SIPI 0x600 |
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114 | #define LAPIC_LVTT 0x320 |
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115 | #define LAPIC_LVTPC 0x340 |
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116 | #define LAPIC_LVT0 0x350 |
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117 | #define LAPIC_LVT1 0x360 |
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118 | #define LAPIC_LVTE 0x370 |
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119 | #define LAPIC_TICR 0x380 |
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120 | #define LAPIC_TCCR 0x390 |
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121 | #define LAPIC_TDCR 0x3E0 |
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122 | |
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123 | #endif /* _APIC_H */ |
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124 | |
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125 | /** @} */ |
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